Sep 26 – 30, 2011
Vienna, Austria
Europe/Zurich timezone

Novel interconnect techniques for hybrid pixel detectors

Sep 29, 2011, 4:00 PM
2h 30m
Vienna, Austria

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria
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Speaker

Timo Tick (CERN)

Description

The next generation hybrid pixel detectors in particle physics experiments require reduced mass budget, increased interconnection density and they need to be tileable to seamlessly cover large areas. These criteria cannot be fulfilled with present day interconnection techniques. As a result the particle physics community has recently put in a lot of effort to investigate and evaluate variety of novel interconnection technologies. This paper presents results of interconnect studies done at CERN PH/ESE, focusing mainly on two technologies: Carbon Nano Fiber (CNF) interconnects and Through Silicon Vias (TSV). Initial results of the CNF interconnects are reviewed and the status and future plans of a joint TSV development project with CEA-LETI Minatec are presented.

Summary 500 words

Using Carbon Nano Fibers (CNF) as electrical interconnects is a novel concept that has potential to be used as an extremely low mass interconnects for hybrid pixel detectors. The currently used solder micro bumps with a pitch of ~ 50 um contribute ~0.02% X0 to the mass budget, which is equivalent of ~20 um of silicon and is thus quite insignificant. However, when the interconnect pitch is decreased to 25 um the mass contribution of the solder micro bumps will drastically increase. This dead mass would be much better used collecting charge on the silicon sensor.
CERN PH/ESE has started a joint project with a Swedish company Smoltek to study the CNF interconnects. The status of the project is reviewed and preliminary results of the CNF interconnects are presented.

Through Silicon Via (TSV) technology is an essential building block required to build low mass large area pixel detectors with minimal dead space. The present day solution of using wire bond interconnections over one edge of a detector tile yields poor active area coverage. Tilting and interleaving of detector modules has been used to reduce the dead space caused by the interconnections, but with a cost of increase in the mass budget and thickness of the detector plane.
There have been many projects, as well as there are many projects still going on, in particle physics community that are trying to utilize the benefits of TSVs in building large area pixel detectors and to make the technology available for the community. This paper presents a recently started project between CEA-LETI Minatec and a group of institutes and CERN collaborations. The project aims to use Medipix3 wafers and an existing “via last” TSV process made available by CEA-LETI to demonstrate the feasibility of TSVs on a functional detector chips. The status of the project, TSV design and future plans are presented.

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