26–30 Sept 2011
Vienna, Austria
Europe/Zurich timezone

Session

A2 - ASICs

A2
27 Sept 2011, 14:50
Vienna, Austria

Vienna, Austria

<font face="Verdana" size="2"><b>Vienna University of Technology</b> Department of Electrical Engineering Gusshausstraße 27-29 1040 Vienna, Austria

Conveners

A2 - ASICs

  • Christophe de La Taille (CNRS LAL Orsay)

Presentation materials

There are no materials yet.

  1. Mr Jakub Moron (AGH University of Science and Technology)
    27/09/2011, 14:50
    ASICs
    Oral
    The design and measurements results of low power Phase-Locked Loop (PLL) prototype for applications in particle physics detectors readout systems are presented. The PLL is designed and fabricated in 0.35~$\mu$m CMOS technology. First measurements show that the ASIC is fully functional and generates clock in the frequency range 380MHz-1.1GHz. The PLL power consumption at 1~GHz is about 4.5...
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  2. Ms Nathalie SEGUIN-MOREAU (OMEGA / IN2P3 - CNRS)
    27/09/2011, 15:15
    ASICs
    Oral
    SKIROC (Silikon pin Kalorimeter Integrated ReadOut Chip) is the very front end chip designed for the readout of the Silicon PIN diodes foreseen for the Electromagnetic CALorimeter (ECAL) of the future International Linear Collider. The very fine granularity of the ILC calorimeters implies a huge number of electronics channels (82 millions) which is a new feature of “imaging”...
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  3. Dr David Gascon (Universidad de Barcelona)
    27/09/2011, 15:40
    ASICs
    Oral
    A wideband current mode preamplifier with 16 bits dynamic range (DR) is presented. It has been designed for the cameras of the Cherenkov Telescope Array (CTA). A novel current division scheme at the very front end part of circuit splits the input current in to two scaled currents which are connected to independent current mirrors. The mirror of the high gain path comprises a saturation control...
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