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Description
A monolithic pixel sensor test chip for PANDA micro-vertex detector has been implemented in 180 nm HVCMOS technology on a high resistivity substrate. The sensor should have very high time resolution (1 ns sigma) and high dynamic range (up to 1000). The pixel electronics contains a Charge Sensitive Amplifier (CSA), a feedback circuit and two comparators. One comparator receives the fast signal and enables accurate time measurement. The other comparator receives the low pass filtered signal and is used for precise amplitude measurement. This publication presents several novel features of PANDA ASIC, its characterization and several measurement results.
Summary (500 words)
We are developing a monolithic particle pixel sensor for PANDA micro-vertex experiment. To evaluate the design a test chip has been designed, produced and tested. The test chip contains a pixel matrix with 29 x 64 pixels of 165µm x 50µm size and digital readout circuits. The chip has been implemented in a 180 nm HVCMOS technology on two high resistivity substrates (370 Ωcm and 5 kΩcm).
The pixel electronics contains a Charge Sensitive Amplifier (CSA), a feedback circuit and two comparators. One comparator receives the fast signal and enables accurate time measurement. The other comparator receives the low pass filtered signal and is used for precise amplitude measurement. Several novel features have been implemented such as variable gain amplifier and time to digital converter with time-amplification. The design goal is to achieve a time resolution of 1 ns sigma and high dynamic range (1000).The high time resolution can be achieved by the use of two comparators, TDC and by correction of time walk. The high dynamic range can be achieved by the adaptive gain amplifier circuit.
The chip has been tested by electric signals. Time resolution of 1.3ns and a dynamic range of 1000 have been measured in this way. Measurements with particles will be done in next weeks.
