Speaker
Dr
Nicolo Vladi Biesuz
(Universita e INFN, Ferrara (IT))
Description
We present the development of a data acquisition system dedicated to de-
tectors using the Timepix4 ASIC, developed in 65nm CMOS technology by the
Medipix4 Collaboration, as integrated front-end.
A control board is needed for system configuration and data acquisition,
up to the maximum bandwidth of 160 Gbps. To avoid the need for multiple
custom boards, we designed a system based on commercial hardware and a
user-configurable open-source firmware and software allowing for reusability and scalability of the system.
Summary (500 words)
We present the development of a configurable data acquisition system for detectors using the Timepix4 ASIC as an integrated front-end.
We will describe the methodologies that used to allow for full firmware flexibility.
The Timepix4, developed by the CERN Medipix4 Collaboration, is a $65~\mathrm{nm}$ CMOS ASIC designed for hybrid pixel detectors.
The ASIC implements a matrix of $512\times448$ bump-pads pixels representing the analog inputs for each pixel distributed over an active area of $6.94~\mathrm{cm^2}$.
Data coming from the pixel matrix are processed and the Time-over-Threshold and Time-of-Arrival information encoded as 64-bit digital data are output on 16 differential digital links running at a maximum rate of $10.24~\textrm{Gbps}$.
We propose a fully customizable system based on commercial hardware and standard communication protocols allowing for its reusability in different projects.
Customization of the system is provided by an open-source fully configurable firmware, described here, and a dedicated software.
The system is based on a Xilinx KCU105 development kit and uses a standard VITA 57.1 connector as interface to the detector.
A combination of the IPbus protocol and firmware and of the use of Hog features allows for an easy configuration of the modules to be instantiated.
As shown in Figure, the firmware top level module is divided in three main blocks.
A $1~\textrm{GbE}$ connection provides communication with a remote server for configuration.
This module is connected to a set of slaves used to configure the detector and ancillary electronics.
Finally a fully configurable high speed data-path allows for read back of output data through two $10~\textrm{GbE}$ connections.
The slaves needed to configure a specific system are selected at project creation, thus avoiding the allocation of FPGA resources to unused modules.
The customization is based on a bash that allows to interactively select the slaves to be instantiated and generate a dedicated address-table for the modules.
At the end of the customization process, a project is automatically generated and compiled, users can further expand the project or simply use it as it is.
Data coming from the Timepix4 output links are sent to an optional data-reduction logic, provided by the user if needed.
A router followed by a merger logic provides a data path to the output $10~\textrm{GbE}$ links.
As shown only 8 out of the 16 Timepix4 links are routed to the FPGA, furthermore the presence of 2 $10~\textrm{GbE}$ links places a strong constraint on the maximum allowable data rate.
Systems needing the full Timepix4 output bandwidth can avoid this bottleneck by disabling this logic and by routing the output links directly to electro-optical transceivers for remote readout and analysis.
We presented the approach used to develop a firmware for a fully configurable data acquisition system.
This system is composed by a commercial hardware and open-source firmware and software.
Both the firmware and software can be configured to tailor the requirements of different detectors.
The system is currently under development and a prototype system has shown good results.
Authors
Angelo Cotta Ramusino
(Universita e INFN, Ferrara (IT))
Massimiliano Fiorini
(Universita e INFN, Ferrara (IT))
Michael Campbell
(CERN)
Dr
Nicolo Vladi Biesuz
(Universita e INFN, Ferrara (IT))
Riccardo Bolzonella
(University of Ferrara and INFN)
Viola Cavallini
(Universita e INFN, Ferrara (IT))
Xavi Llopart Cudie
(CERN)
