3rd FPGA Developers' Forum (FDF) meeting

Session

AI

28 May 2026, 11:00

500/1-001 - Main Auditorium (CERN)

Conveners

AI: 1

• Rui Zou (Cornell University (US))

184. AMD Embedded AI Solutions

Mr Thomas Gmeinder (AMD)

28/05/2026, 11:00

Talk

AI-driven applications in industrial automation, robotics, automotive, and scientific instrumentation demand high inference performance with low, predictable latency and long-term reliability. These demands can only be met by local AI processing for which AMD offers complementary embedded AI platforms.

The Ryzen AI Embedded processor family integrates CPU, GPU, and NPU compute engines on a...

122. KalEdge-Lite: Hardware-Aware ML-to-FPGA Deployment with Automated hls4ml Integration

Romina Soledad Molina (kaleidoforge)

28/05/2026, 11:45

Algorithm implementation in HDL and HLS

Talk

KalEdge-Lite is a hardware-aware framework that automates neural network deployment on FPGA platforms through an end-to-end ML-to-bitstream workflow. The system integrates model training, compression techniques, hardware-aware evaluation, and automated accelerator generation. A regime-aware analytical model estimates FPGA resource utilization and latency before synthesis, enabling rapid...

163. HGQ: High Granularity Quantization for Real-time Neural Networks and LUT-Based Inference

Chang Sun (California Institute of Technology (US))

28/05/2026, 12:05

Algorithm implementation in HDL and HLS

Talk

Neural networks with sub-microsecond inference latency are required by many critical applications.
Targeting such applications deployed on FPGAs, we present High Granularity Quantization (HGQ), a quantization-aware training framework that optimizes parameter bit-widths through gradient descent.
Unlike conventional methods, HGQ determines the optimal bit-width for each parameter...