Speaker
Description
Single photon counting detectors revolutionized data acquisition at synchrotrons when they were introduced in the mid-2000s and quickly became ubiquitous at beamlines. We believe they will continue to play an important role for diffraction-limited light sources, even as the increased flux makes counting more challenging due to pulse pile-up in the analog front end.
Matterhorn is a new readout chip designed at PSI in UMC 110 nm technology. It features a pixel size of 75 × 75 µm², with four counters per pixel and a configurable counter depth between 4 and 16 bits. The chip is optimized for fast counting, targeting 20 Mcps/pixel with 90% efficiency by using the four counters for pile-up tracking. With 4 × 3.125 Gbit/s serializers, the maximum continuous frame rate is 10 kHz at 16-bit depth, scaling up to 40 kHz in 4-bit mode. The chip can also be configured in gating mode for pump probe experiments with a design target of 20 ns for the shortest gate. The readout board is based on an Enclustra SOM with a Xilinx Zynq UltraScale+ FPGA and a 100 Gbit/s fiber connection.
In this paper, we present the first characterization of the full-size 256 × 256 pixel chip bump-bonded to a 320 µm thick silicon sensor, as well as the design of the 500k module, which will serve as a building block for large-area detectors.