Speaker
Description
Summary
The development of ASICs for the readout of high-energy physics experiments is time consuming and expensive, in particular for projects which only need a small number of readout chips. For the current LHC experiments the development of radiation hard or radiation tolerant ASICs was often the only solution to construct the high performance readout. Meanwhile, there exists high performance FPGAs with high bandwidth transceivers available which provide a large number of logic elements to realize even multi-channel TDC applications. Modestly radiation tolerant commercial SRAM-based FPGAs could provide viable solutions, at least for apparatus in regions with smaller radiation levels. FPGA based readout electronics would provide a higher flexibility at probably small costs than the development of complicated ASICs.
We have studied the radiation tolerance of the Arria GX FPGA from Altera on which a multi-channel TDC were implemented. The FPGA based design could be a possible option for the replacement of the readout electronics of the LHCb Outer Tracker detector to accommodate a 40 times higher readout speed. Two FPGAs were irradiated with 20 MeV protons at the Max Planck Institute for Nuclear Physics to study this.
For this test, a PCB was developed to carry the FPGA, which is pin compatible to the existing readout board of the LHCb Outer Tracker. The FPGA used in this test board, replaces the 32 channel TDC for drift time measurements, the OTIS chip and the GOL serializer chip. Both chips have to be replaced for the upgrade of LHCb to a 40MHz readout. The test boards were irradiated with protons leaving the beam vacuum through a 100 µm stainless-steal window, travelling through 8 cm of air to the FPGA. Before the irradiation, the beam profile was measured with a straw-tube module. Using these data, a simulation was written to describe the dose in the different parts of the experimental setup. In addition, three pairs of passive dosimeters (alanine) were used to measure the integrated dose at different spots in the beam profile. Simulation and measurements show a very good agreement.
During and between the irradiation periods, the different FPGA currents, the package temperature, the firmware error rate, the PLL stability and the stability of a 32 channel TDC were monitored. The behaviour of the different currents during irradiation with different intensities and durations as well as subsequent power cycles with reconfiguration of the FPGA will be described. In addition, the measured firmware error rate will be illustrated and compared to the Outer Tracker readout electronics environment of the LHCb upgrade scenario. The frequency and phase stability of the PLL, which is not only crucial for the TDC will be shown. Also the stability of the TDC measurement and the change of the bin size versus dose will be presented.
The results of the irradiation campaign show that the Arria GX FPGA exceeds the required radiation tolerance of 30 krad for the upgrade of the LHCb Outer Tracker to a 40MHz readout with an expected firmware error rate of ~10^-6 Hz makes a usage of the chip in LHCb feasible.
