26–30 Sept 2016
Karlsruhe Institute of Technology (KIT)
Europe/Zurich timezone

Test Strategies for Industrial Testers for Converter Controls Equipment

28 Sept 2016, 17:22
1m
Building 11.40 Room 014

Building 11.40 Room 014

Board: K4
Poster Production POSTER

Speaker

Patryk Wojciech Oleniuk (Ministere des affaires etrangeres et europeennes (FR))

Description

Power converters and their controls electronics are key elements for the operation of the CERN accelerator complex. To achieve a high MTBF of the system, a set of industrial testers for the converters controls electronics is used. The paper is a follow-up after a similar paper at TWEPP2015, including more test platforms(Boundary-Scan) and the outcome after test phase in production. We report on the test software and hardware design and test strategy applied for a number of devices, that resulted in maximizing the test coverage and minimizing the test design effort.

Summary

Power converters and their controls electronics are key elements for the operation of the CERN accelerator complex, having a direct impact on its availability. To achieve a high MTBF(Mean-Time-Between-Failure) of the system and easy ways to verify equipment, a set of industrial testers is used throughout the converters controls electronics' life phases. The roles of the testers are to validate mass production during the manufacturing phase and to provide means to validate and repair failed modules that are brought back from the operation. In TE-EPC-CCE section, two main test system platforms were adopted: a PXI platform for mixed analogue-digital functional tests and a JTAG-BS(JTAG Boundary-Scan) platform for digital interconnection and functional tests. Depending on the functionality of the device under test, appropriate test platforms were chosen. The paper is a follow-up after a similar paper at TWEPP2015, including more test platforms(Boundary-Scan), and the outcome after test phase in production. We report on the test software and hardware design and test strategy applied for a number of devices, that resulted in maximizing the test coverage and minimizing the test design effort.

Primary author

Patryk Wojciech Oleniuk (Ministere des affaires etrangeres et europeennes (FR))

Co-authors

Dr Benjamin Todd (CERN) David Nisbet (CERN) Matteo Di Cosmo (CERN) Vasileios Kasampalis (Ministere des affaires etrangeres et europeennes (FR))

Presentation materials