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Description
This paper proposes a novel 2.56 Gbps radiation hardened by design LVDS/SLVS like receiver for use in transmission systems requiring timing accuracy. The circuit, designed in a commercial 65 nm CMOS technology, uses a replica receiver with charge pump feedback. This feedback loop equalizes the propagation delay of the outputs rising and falling edge, independent of total ionizing dose (TID) radiation effects. The measured output signal has an RMS jitter of 3 ps at a maximum data rate of 2.56 Gbps. The circuit consumes only 1 mW of power from a 1.2 V power supply.
Summary
High precision time-domain signal processing circuits are required in many of today’s applications like particle detectors in high energy physics experiments such as the CMS and ATLAS experiments at the Large Hadron Collider (LHC) in CERN or laser-ranging sensors. These applications embed their key information in the time difference between multiple signals or events. This timing information is usually converted to the digital domain by a time to digital converter (TDC). However, in large and/or complex systems, the distance between the event generator and the TDC can become rather large necessitating long distance transmission of these signals, while preserving their timing information.
Because of their high speed, low power consumption and interference robustness, Low Voltage Differential Signaling (LVDS) and Scalable Low Voltage Signaling (SLVS) are commonly. The SLVS standard is comparable to LVDS, but with a lower voltage swing and a 200 mV common mode voltage instead of 1.2 V. For communication applications, the regenerative nature of the receivers allow for some jitter tolerance, provided that the bit error rate remains sufficiently low. However, in the envisaged applications the LVDS link will be placed in the accurate time signal path. Hence, any jitter or distortion introduced by this link will decrease the systems resolution. So to allow the use in accurate time-domain circuits, the propagation delay of all output edges must be the same and the jitter must be minimized.
This paper focusses on the design of a Total Ionizing Dose (TID) radiation hardened by design LVDS/SLVS receiver for long distance analog timing signals transmission. The proposed receiver uses an NMOS input pair, single ended output op-amp structure. In radiation environments, the total ionizing dose (TID) will cause degeneration of the charge carrier mobility and shifts in the threshold voltage. These effects will introduce a mismatch between the propagation delay of the outputs rising and falling edge. The proposed circuit compensates this mismatch by introducing a replica receiver with charge pump feedback. An ideal clock at the input of this replica receiver generates a clock signal at the output with a duty cycle of 50 % and a common mode voltage of VDD/2. Any deviation from this 50 % duty cycle, caused by the TID effects, will alter the common mode voltage. This error signal is then used to adjust the currents through the proposed receiver, in order to equalize the propagation delay of the rising and falling output edges. At 500 Mrad, simulation results of the proposed feedback circuit show a 44 times lower shift in propagation delay error compared to an open loop receiver circuit. The proposed receiver has a measured output jitter of only 3 ps at a 2.56 Gbps data rate while consuming only 1 mW of power from a 1.2 V power supply.
