Remote control unit of the LHC injector complex BLM system

18 Sept 2018, 17:20
1h 30m
FBS 0.01/0.02 (Feestzaal)

FBS 0.01/0.02 (Feestzaal)

Poster Programmable Logic, Design Tools and Methods Posters

Speaker

Eva Calvo Giraldo (CERN)

Description

The strategy for beam setup and machine protection of the accelerators at the European Organization for Nuclear Research (CERN) relies strongly on their Beam Loss Monitoring (BLM) systems, which are currently being renovated. The main acquisition path has shown very promising results, and development is now concentrated to provide advanced remote diagnostics, setup and monitoring features. In this domain, a new remotely controlled module is under design with the primary function to provide remote calibration of the acquisition cards by controlling an embedded current source and adjusting the analogue circuit of each channel to compensate component tolerance, noise and ageing.

Summary

The strategy for beam setup and machine protection of the accelerators at the European Organization for Nuclear Research (CERN) relies strongly on their Beam Loss Monitoring System (BLM). The reliability of such a system could directly affect the availability of the accelerator facility. Several BLM systems are under renovation following the LHC Injector Upgrade project which foresees higher brightness beams.
The new main acquisition path has shown promising results with beam. To further improve, development is undergoing for its remote diagnostics, setup and monitoring features. In this domain, a new remotely controlled Beam Loss Electronics Control Unit (BLERC) module is currently under design. It will be hosted in the acquisition crate (BLEAC) where the BLM front-end cards (so-called BLEDPs) are also located. Its functionalities will include the continuous monitor of the BLEAC and BLEDP modules’ power consumption, and a method to remotely calibrate the front-end acquisition cards by controlling a current source embedded on the custom-made BLEAC backplane, analysing online the measurements and optimising the analogue circuits’ configuration. These features will also allow performing systematic verification of the full acquisition and processing chain of every channel in a fast, repetitive and reliable way.
This paper will present the new module’s characteristics and the plans to use to it to verify the full acquisition and processing chain of each channel.

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