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Description
For the ATLAS Phase-II upgrade, a complete new all-silicon inner tracker is planned, which will be readout at higher bandwidth due to finer granularity and higher occupancy.
While both subdetectors allow the usage of the GBT protocol on the downlink path, ITk Pixel needs a different uplink protocol due to the constrains given.
This work shows how a detector specific extension of the FELIX firmware could look like and which blocks are needed for the ITk Pixel subdetector. It also gives an outlook on how this can be beneficial for the ITk Strip subdetector as both subdetektors have common features.
Summary
For the ATLAS Phase-II upgrade, a complete new all-silicon inner tracker (ITk) is planned. ITk will consist of an outer strip-detector and an inner pixel-detector. Both have completely new sets of front-end ASICs. While both sets allow the usage of the GBT protocol on the downlink path, the ITk Pixel subdetector needs a different uplink protocol (i.e. the AURORA protocol) due to the high data rates (up to 5Gbps per front-end) and the GBT chip not being radiation hard enough to be placed where it would be needed.
The new ATLAS-wide readout cards called FELIX (FrontEnd LInk eXchange) will be used for translation between the front-end links and a COTS networking environment, in which all further processing steps are located. The FELIX firmware needs some front-end specific extensions to fit the specific requirements of the ITk detector.
This work shows a possible implementation of such a firmware extension for the ITk Pixel subdetector. It includes conversion of TTC signals into commands for the front-end chips as well as support for trigger tags instead of Bunch Crossing ID and Trigger ID for event identification for the downlink path. On the uplink side, an AURORA decoder block will be used for deserialisation and descrambling. Also, decoders and monitoring blocks are needed for low-level error handling and busy propagation.
At the end, an outlook on how this can be beneficial for the ITk Strip subdetector is given as both subdetectors have some common features like 160 Mbps downlink speed and 16 bit frame size.
