RD50 - HV-CMOS

Name: RD50 - HV-CMOS
Start: 2018-07-13T10:00:00+02:00
End: 2018-07-13T12:00:00+02:00
Location: No location set

Friday 13 Jul 2018, 10:00 → 12:00 Europe/Zurich

- 1
  
  Introduction
  
  Speaker: Eva Vilella Figueras (University of Liverpool (GB))
  
  2018_Vilella_RD50_meeting_July.pdf
- 2
  
  Design of matrix 1 for RD50-ENGRUN1 - Analog sampling
  
  Speaker: Oscar Alonso Casanovas (University of Barcelona)
  
  HV-CMOS_sampling.pdf
- 3
  
  Design of matrix 1 for RD50-ENGRUN1 - Column drain readout
  
  Speakers: Francisco Rogelio Palomo Pinto (Universidad de Sevilla (ES)), Francisco Rogelio Palomo Pinto (Universidad de Sevilla (ES))
  
  13Julio2018HVCMOS_RD50Rogelio.pdf
  
  13Julio2018HVCMOS_RD50Rogelio.pptx
- 4
  
  Design of matrix 2 for RD50-ENGRUN1 - TDC
  
  Speaker: Raimon Casanova Mohr (The Barcelona Institute of Science and Technology (BIST) (ES))
  
  RD50IFAE130718.pdf
- 5
  
  Design of matrix 3 for RD50-ENGRUN1 - Fast pixels
  
  Speakers: Chenfan Zhang (University of Liverpool (GB)), Chenfan Zhang (University of Liverpool)
  
  HV-CMOS with RD50 - Vidyo meeting (13.07.2018).pdf
- 6
  
  Development of a generic DAQ for RD50-MPW1, RD50-ENGRUN1 and beyond
  
  Speakers: Ricardo Marco Hernandez (Instituto de Fisica Corpuscular (ES)), Ricardo Marco Hernandez (CERN)
  
  RD50_HVCMOS_Meeting_07_2018.pdf
- 7
  
  Uni. Bonn experience with CMOS sensors
  
  Speaker: Tomasz Hemperek (University of Bonn (DE))
  
  DMAPS-RD50.pdf
- 8
  
  CPPM experience with CMOS sensors
  
  Speaker: Marlon B. Barbero (CPPM, Aix-Marseille Université, CNRS/IN2P3 (FR))
  
  CPPM_CMOSsensors.pdf
- 9
  
  IRFU experience with CMOS sensors
  
  Speakers: Yavuz Degerli (CEA - Centre d'Etudes de Saclay (FR)), Yavuz Degerli (Université Paris-Saclay (FR)), Yavuz Degerli (CEA Saclay)
  
  Degerli_RD50meeting_13july2018_v2.pdf
- 10
  
  Discussion

Choose timezone

RD50 - HV-CMOS