22–27 Sept 2019
Hyatt Regency Hotel Vancouver
Canada/Pacific timezone

Thu-Af-Or21-06: Design and Test of 40 kV / 2 kA DC Superconducting Fault Current Limiter

26 Sept 2019, 15:15
15m
Regency EF

Regency EF

Speaker

Qingquan Qiu (Institute of Electrical Engineering, Chinese Academy of Science)

Description

The resistive type superconducting fault current limiter (SFCL) is suggested to suppress the surge current in voltage sourced converter based HVDC (VSC-HVDC) power systems. The general design scheme of 40 kV/2 kA resistive DC SFCL is discussed firstly. Furthermore the electromagnetic analysis and structure design of the current limiting element are performed in emphasis. In order to study the current limiting performance of the DC SFCL under the rapid change of fault current, the dynamic simulation model and test platform are established. Finally, the current limiting and quench recovery properties of the SFCL are tested. According to the measurement results, the maximum impact current could be limited to 10kA, the largest resistance of SFCL module is about 2 Ω,and the quench recovery time could be controlled within 300 ms if the dc circuit breaker is switched off within 5ms.

Authors

Qingquan Qiu (Institute of Electrical Engineering, Chinese Academy of Science) Prof. Liye Xiao (Chinese Academy of Sciences) Zhifeng Zhang (Institute of Electrical Engineering Chinese Academy of Sciences) Jingye Zhang (Institute of Electrical Engineering,Chinese Academy of Sciences) Prof. Naihao Song Ms Liwei Jing Prof. Guomin Zhang (Key Laboratory of Applied Superconductivity, Institute of Electrical Engineering,Chinese Academy of Sciences) Dong Xia (Chinese Academy of Sciences)

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