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Nov 4 – 8, 2019
Adelaide Convention Centre
Australia/Adelaide timezone

hls4ml: deploying deep learning on FPGAs for L1 trigger and Data Acquisition

Nov 7, 2019, 12:15 PM
15m
Riverbank R5 (Adelaide Convention Centre)

Riverbank R5

Adelaide Convention Centre

Oral Track 1 – Online and Real-time Computing Track 1 – Online and Real-time Computing

Speaker

Vladimir Loncar (University of Belgrade (RS))

Description

Machine learning is becoming ubiquitous across HEP. There is great potential to improve trigger and DAQ performance with it. However, the exploration of such techniques within the field in low latency/power FPGAs has just begun. We present hls4ml, a user-friendly software, based on High-Level Synthesis (HLS), designed to deploy network architectures on FPGAs. As a case study, we use hls4ml for boosted-jet tagging with deep networks at the LHC. We map out resource usage and latency versus network architectures, to identify the typical problem complexity that hls4ml could deal with. We discuss current applications in HEP experiments and future applications. We also report on recent progress in the past year on newer neural network architectures and networks with orders of magnitude more parameters.

Consider for promotion Yes

Primary authors

Nhan Viet Tran (Fermi National Accelerator Lab. (US)) Vladimir Loncar (University of Belgrade (RS))

Presentation materials