Speaker
Description
The first level (L0) muon trigger of the ATLAS experiment will be upgraded to operate at the High Luminosity LHC.
The selectivity of the current L0 muon trigger is limited by the moderate spatial resolution of RPC and TGC. The MDT chambers currently used for precision tracking will be therefore included to improve the momentum resolution and the redundancy.
A hardware demonstrator of the MDT trigger processor is presented. It consists of an ATCA blade, constructed of two separate modules, and based on FPGA technology. An overview of the explored algorithms for the track finding task will also be shown.
Summary
The first level (L0) muon trigger of the ATLAS experiment will be upgraded to operate at the High Luminosity LHC.
The selectivity of the current L0 muon trigger is limited by the moderate spatial resolution of RPC and TGC. The MDT chambers currently used for precision tracking will be therefore included to improve the momentum resolution and the redundancy.
In the Phase-II scheme, the MDT trigger processors will receive MDT hits from the detectors and match them to the trigger candidates (seeds) from the RPC and TGC+NSW trigger chambers. These seeds provide a region of interest (RoI) and the identification of the bunch
crossing from which the muon originated. This is the t 0 for computing the MDT drift time from the arrival time of the hit. MDT hits matched to the RoI are then used by the MDT trigger algorithm to improve the momentum resolution, by forming track segments and
joining them together for momentum determination.
A hardware demonstrator of the MDT trigger processor is presented. It consists of an ATCA blade, constructed of two separate modules called the "Command Module" and "Service Module", and based on FPGA technology. An overview of the explored algorithms for the track finding task will also be shown.
