Speaker
Description
A new inner tracker (ITk) is to be installed inside the solenoid magnet of the upgraded ATLAS detector, to measure tracks of charged particles produced in the proton-proton collisions at the high-luminosity large hadron collider (HL-LHC) at CERN. Silicon strip detectors cover outer layers of ITk with $\sim$165 m$^{2}$ of silicon sensors, composed of "short strips" (2.41 cm long) and "long strips" (4.83 cm long) sections in the inner and outer layers, respectively, split at a radius of $\sim$75 cm to cope with the density of tracks.
A prototype silicon strip sensor for the "long strips" in the barrel section, ATLAS17LS, was laid out having the largest sensor in the 6-in. silicon wafer, with an outer dimension of 9.80 (width)$\times$9.76 (length) cm$^{2}$, two rows of strip segments, strip pitch of 75.5 $\mu$m, and an edge space of 450/550 $\mu$m in the longitudinal/lateral direction to the strips (slim edge), as well as miniature sensors and test structures in the wafer periphery for validating and monitoring the sensors. The sensor is a single-sided n-in-p AC-readout strip sensor, made of n$^{+}$ implant strips for signal collection in p-type wafer material, AC-coupled to readout electronics, and implementing knowledge for high voltage operation up to 1000 V, to have good signal-to-noise ratio until the end of life of the HL-LHC operation.
The ATLAS17LS sensors had two purposes: (1) qualification of the sensor itself, technology and capability of fabricating vendors, and (2) serving for prototyping the building block of the strip detector, the strip modules. Hamamatsu Photonics (HPK) was one of two vendors participating in the evaluation along with Infineon Technologies (IFX). The sensors at HPK were fabricated in 3 batches: 1$^{st}$ with the silicon wafer (320 $\mu$m physical thickness) and the active thickness of standard or as thin as 250 $\mu$m, 2$^{nd}$ with a small number of supplementary sensors of special passivation to investigate humidity sensitivity of passivation, and 3$^{rd}$ with a dicing scheme of structures in the wafer periphery in the series-production style.
| Submission declaration | Original and unpublished |
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