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Studies for low mass large area monolithic silicon pixel detector modules using the MALTA CMOS pixel chip

Dec 14, 2019, 3:07 PM
POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6 (International Conference Center Hiroshima)

POSTER - Sun: B1F-Meeting room#3, B2F-RAN1/2; Mon-Wed: B1F Meeting rooms #5-6

International Conference Center Hiroshima

Peace Memorial Park, Hiroshima-shi
POSTER Large scale applications POSTER


Petra Riedler (CERN)


Monolithic silicon pixel sensors combine the electronics and sensing layer in one silicon element and are produced in commercial CMOS processing lines without the need for a fine pitch interconnection technology as used for hybrid silicon pixel detectors. This reduces the overall cost, but also the complexity of the module assembly procedure. The sensors can be thinned to typical thicknesses of 100 microns or less, thus reducing the contribution of the silicon to the material budget. In present pixel detectors each pixel sensor is connected to a flexible circuit providing the necessary data and power connections. The flexible circuit contributes to the overall material budget in addition to the silicon and the mechanical support and cooling structures. Finally, all connections need to be routed within the narrow space available particularly in the innermost areas of the experiments.

The MALTA monolithic silicon pixel sensors have been used to study dicing and thinning of monolithic silicon pixel detectors for large area and low mass modules. Dicing as close as possible to the active circuitry will allow to build modules with very narrow inactive regions between the sensors. Inactive edge regions of less than 5 microns to the electronic circuitry could be achieved for 100 um thick sensors. The MALTA chip also offers the possibility to transfer data and power directly from chip to chip. Tests have been carried out connecting two MALTA chips directly using ultrasonic wedge wire bonding. Results from lab tests will be presented that show that the data accumulated in one chip can be transferred correctly via the second chip, without the need of a flexible circuit. The concept of chip to chip data and power transfer to achieve low mass modules has also been studied on prototype wafers using Cu-stud interconnection bridges. First mechanical results are presented, outlining technical challenges and possible furture steps to achieve a low mass large area monolithic pixel sensor module.

Submission declaration Original and unpublished

Primary authors

Petra Riedler (CERN) Ignacio Asensi Tortajada (Univ. of Valencia and CSIC (ES)) Marlon B. Barbero (CPPM - CNRS/IN2P3 / Aix-Marseille Université (FR)) Ivan Berdalovic (CERN) Daniela Bortoletto (University of Oxford (GB)) Siddharth Bhat (CPPM, Aix-Marseille Universite , CNRS/IN2P3) Craig Buttar (University of Glasgow (GB)) Roberto Cardella (CERN) Florian Dachs (Vienna University of Technology (AT)) Valerio Dao (CERN) Yavuz Degerli (CEA - Centre d'Etudes de Saclay (FR)) Mateusz Dyndal (CERN) Leyre Flores Sanz De Acedo (University of Glasgow (GB)) Patrick Moriishi Freeman (University of Birmingham (GB)) Amr Habib (Centre National de la Recherche Scientifique (FR)) Francesco Piro (CERN) Bojan Hiti (Jozef Stefan Institute (SI)) Magdalena Munker (CERN) Konstantinos Moustakas (University of Bonn (DE)) Thanushan Kugathasan (CERN) Heinz Pernegger (CERN) Enrico Junior Schioppa (CERN) Abhishek Sharma (University of Oxford (GB)) Lluis Simon Argemi (University of Glasgow (GB)) Walter Snoeys (CERN) Tomislav Suligoj (University of Zagreb) Philippe Schwemling (CEA/IRFU,Centre d'etude de Saclay Gif-sur-Yvette (FR)) Tianyang Wang (University of Bonn (DE)) Norbert Wermes (University of Bonn (DE)) Tomasz Hemperek (University of Bonn (DE))

Presentation materials