Speakers
Description
HEPS-BPIX3 is the third prototype of single-photon counting pixel detector with 1.4 million pixels developed for applications of synchrotron light sources. It follows the first prototype, HEPS-BPIX, with a pixel size of 150 µm x 150 µm and frame rate up to 1.2 kHz at 20-bit dynamic range. To reduce the insensitive gap between modules, we start to upgrade it with the through silicon via (TSV) processing to replace the wire bonding. The TSV processing drills the via at the pad, and makes connection between the front and back sides of the read-out chip. The redistribution layer (RDL) and bump bonding are performed at the bottom of read-out chip to connect the control, readout signals and power supplies to the PCB. The insensitive area is reduced from 26.3% to 12.7%. We have tested the modules with X-ray and synchrotron radiation light, and read-out chip can be operated electrically through the TSV without any performance degradation.
Submission declaration | Original and unpublished |
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