The proposed CEPC (Circular Electron Positron Collider) will offer the measurements of the Higgs properties with a new level of precision. The precise determination of the charged particle tracks and reconstruction of the primary and displaced decay vertices, impose stringent requirements on the CEPC vertex detector, which somehow incompatible with each other, such as high spatial resolution (<3μm), low power consumption (<50mW/cm2) and fast processing speed (<10μs/frame). CMOS pixel sensor with pixel-level discrimination represents one of the most promising candidates. However, the complexity of the in-pixel digital circuit always leads to increased pixel size, which is disfavored to obtain high spatial resolution.
In this context, we propose two pixel-structures with a balance between high precision and circuit simplicity to guarantee compact pixels, yet with satisfying high signal over noise ratio. Both of the two structures are based on the DMAPS (Depleted Monolithic Active Pixel Sensors) concept, employ a high-voltage (up to 10 V) biased charge collection diode, AC-coupled with a comparator with OOS (Output Offset Storage) technique to mitigate pixel-to-pixel performance dispersion. The main difference between the two structures concentrates on the signal amplification stage used in the comparator.
In order to verify the idea, a prototype named JadePix-2 which contains 112×96 pixels has been designed and fabricated with a 0.18 μm CMOS Image Sensor process. Both of the two structures have been realized within 22 μm pixel pitch size. JadePix-2 operates in the rolling-shutter mode, with processing speeds of 100ns/row and 80ns/row, respectively, for the two structures.
Experimental results show the total ENC of the two structures are about 29 e- and 31 e- respectively. More test results and design optimization details will be presented.
|Submission declaration||Original and unpublished|