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Description
The ATLAS level-0 barrel muon trigger for High-Luminosity LHC will use data from RPC and MDT muon detectors and from the Tile Calorimeter. RPC hit data will be collected by on-detector Data Transmitter and Collector (DCT) boards and will be sent off-detector to the Sector Logic (SL) boards. Within a latency of 390 ns the SL boards should provide muon pre-candidates to the MDT trigger processor for an improved momentum measurement. This contribution presents the design of the system and results of recent tests of DCT and SL prototypes and firmware.
Summary (500 words)
The Phase-2 Level-0 (L0) muon trigger system in the barrel region selects muon candidates with
pT > 20 GeV for single-muon triggers, pT > 10 GeV for di-muon triggers and pT > 4 GeV for
topological and multi-object triggers. The output rate for 20 GeV single-lepton is around 40 kHz
for the barrel + endcap regions, around 30 kHz for the barrel only.
The L0 muon trigger algorithm is executed by 32 Sector Logic (SL) boards in the barrel region and
48 SL boards in the endcap region, located in the off-detector experimental hall USA15.
Three concentric layers of Resistive Plate Chamber (RPC) stations are used to perform the L0
muon trigger coincidence algorithm in the barrel region. The Barrel Inner (BI) RPC station is made
of a triple gas gap RPC chamber, the Barrel Middle (BM) station of two double gas gap RPC, the
Barrel Outer (BO) region of one double gas gap RPC.
The on-detector Data Collector Transmitter (DCT) board samples the RPC hit-data and sends it to
the barrel SL with zero suppression. Two DCT boards are mounted on each RPC station in the BO
region, four in the BM region, one or two in the BI region.
The DCT zero suppression logic allows to minimise the data to be sent to the SL, but causes nonfixed transmission time, since it requires local memory buffers to store the data in the DCT during
processing and transmission time. The SL must compensate the different DCT hit transmission
time, event by event, to group and order hits belonging to the same Bunch Crossing (BC) number
before performing the barrel trigger coincidence algorithm every BC.
An ATLAS sector is equipped with up to 50 DCT boards, sending data to one SL board through
optical fibres. The full L0 barrel system is composed by about 1600 DCT boards and 32 SL
boards, one per each ATLAS sector.
The SL is an FPGA based board which receives digitised detector data from the on-detector
electronics and performs the L0 trigger algorithm and the detector readout logic. The SL sends its
muon candidate geometrical coordinates and trigger threshold measurement to the Monitored
Drift Tubes (MDT) Trigger Processor (MDTTP) board, also located in USA15. The MDTTP
reconstructs the muon candidate track in the MDT region identified by the SL and sends the
candidate pT back to the SL with a higher precision. The MDTTP selection algorithm reduces the
RPC rate from around 85 kHz to around 30 kHz. The SL uses the MDTTP results to select the L0
barrel muon candidates and finally sends the candidates information to the Muon Central Trigger
Processor Interface (MUCTPI) board.