A 10Gbps Optical Receiver in 55nm CMOS for Front-end readout electronics in High-Energy Physics Experiments

Not scheduled
20m
Conference room (Wosk Centre)

Conference room

Wosk Centre

Poster ASICs

Speakers

Shiwei YanProf. Di Guo (Central China Normal University)

Description

High-speed bi-directional data communication system with the optical fiber as the transmission medium has been widely used in the front-end readout electronics of high-energy physics experiments.In this data communication system, a high-sensitivity, low-noise and low-power optical receiver ASIC, which includes transimpedance amplifiers (TIA) and LA functions, is crucial.This paper presents the design and test results of a 10Gbps high-speed optical receiver ASIC for applications in high-energy physics experiments. This ASIC uses a pseudo-differential inverter-based TIA structure for low noise consideration, adopts a double-threshold controlled automatic gain controllers (AGC) structure to achieve wide-range gain control. A shared-inductor peaking technique is proposed to achieve high bandwidth with efficient area consumption.
This optical receiver ASIC mainly consists of TIA sub-module, limiting amplifiers(LA) sub-module, AGC sub-module, DC offset cancellation circuits (DCOC), received signal strength indicator(RSSI), and output drive stage.The TIA adopts a pseudo-differential structure based on the inverter structure to convert the high-speed small photocurrent from the Photo-Diode into an amplified voltage signal. The limiting amplifier further amplifies the voltage signal with the shared-inductor peaking technology to improve the bandwidth.Dual-threshold AGC enables continuously adjustable gain with a wide adjustable range and low power consumption.The output drive stage circuit adopts continuous time linear equalizer (CTLE) peaking structure with 50 ohm output impedance matching.
The post-layout simulation results show that this optical receiver ASIC has a transimpedance gain of 77dB with a 12 GHz bandwidth, and an equivalent input noise current of 1.99uA.The whole power consumption is 84mW when working at 10 Gbps,and a sensitivity 40 uA of -16.32dBm @BER 1E-12.The ASIC has been taped out in the end of 2022 and will be tested in September 2023. The optical eye-diagram test, optical sensitive test and the full link BER test will be conducted, the test results will be presented in the meeting.

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