Speaker
Description
The success of the CMS physics program at the HL-LHC requires maintaining sufficiently low trigger thresholds to select processes of interest. With an average expected 200 pileup interactions, critical to achieve this goal is including tracking in the hardware-based L1 trigger. A 40 MHz silicon-based track trigger on the scale of the CMS detector has never been built. The main challenges of reconstructing tracks in the L1 trigger are the large data throughput at 40 MHz and need for a trigger decision within 12.5 μs. To address these challenges, the CMS outer tracker for HL-LHC uses modules with closely spaced silicon sensors to read out only hits compatible with charged particles above 2 GeV. These are used in the back-end L1 track finding system, implemented with FPGA technology. This poster will discuss the L1 tracking algorithm and implementation, present simulation studies of estimated performance, and show results from hardware studies at the CERN Tracker Integration Facility.
