Speakers
Description
The COLUTA ASIC is an 8-channel 15-bit 40 MSPS ADC fabricated in 65 nm CMOS for the upgrade of the readout of the ATLAS LAr calorimeter for the high luminosity LHC. The ADC architecture couples a 3.5-bit Multiplying-DAC (MDAC) stage to a successive approximation register (SAR) ADC with a digital back-end that outputs sample data continuously via 640 Mbps serial LVDS. The analog performance and radiation tolerance tests and measurements of the production COLUTA ADC will be presented, along with the robotic multi-chip test setup and procedures developed for the verification of 80,000 COLUTA ADC ASICs.
Summary (500 words)
To meet new physics challenges and withstand the expected radiation doses at the high-luminosity LHC (HL-LHC), the ATLAS Liquid Argon Calorimeter readout electronics will be upgraded. The triangular calorimeter signals are amplified and shaped by analog electronics over a dynamic range of 16 bits, with low noise and excellent linearity. In order to digitize the analog signals on two overlapping gain scales after shaping, the radiation-hard, low-power 40 MHz 15-bit COLUTA ADC was developed.
The COLUTA ADC ASIC is a custom 8-channel 15-bit 40 MSPS ASIC fabricated in 65nm CMOS. The ADC architecture couples a 3.5-bit Multiplying-DAC (MDAC) stage to a successive approximation register (SAR) ADC with an on-chip Digital Data Processing Unit (DDPU) that determines and applies the MDAC and SAR calibration constants and formats the output data. The sample data and frame are continuously output via 640 Mbps serial LVDS to CERN Low Power Gigabit Transceiver (lpGBT) ASICs.
Measurements of the production version of the COLUTA ADC verify the sampling performance above specification of >11.5-bit ENOB at the characteristic frequencies of the LAr signals. The design and development of the ADC will be presented, along with performance measurements. The ADC was tested in a proton beam to confirm the radiation tolerance. The results of this testing, including the Single Event Effects (SEE) cross section measurement, will also be presented.
In order to test the 80,000 COLUTA ADCs for the LAr upgrade, a robotic multi-chip test setup has been prepared. The design of this setup, along with initial yield measurements, with a particular emphasis on the process-related spread of key ASIC parameters related to qualification, will be discussed.
