Speaker
Description
The Compact Muon Solenoid (CMS) Tracker Phase 2 Upgrade for the High Luminosity Large Hadron Collider (HL-LHC) will use two module types, 2S and PS, which contain different sensor configurations and custom ASICs. Guaranteeing the power integrity of all the built modules and for the full lifetime of the detector is crucial for the detector performance. This article describes the historical evolution of the powering architecture, the problems encountered, and the solutions implemented for the 2S and PS modules, as well as the final on-module powering strategy along with the data and modelling that led to it.
Summary (500 words)
Two module types (2S and PS) will be used in the Compact Muon Solenoid (CMS) Tracker Phase 2 Upgrade for the High Luminosity Large Hadron Collider (HL-LHC). The 2S modules contain a double strip sensor configuration with an active area of (10 × 10) cm2, wire bonded to two front-end hybrids (FEHs) that are powered and controlled by a service hybrid (SEH). The PS modules contain a strip sensor and a macro-pixel sensor of (5 × 10) cm2 wire bonded to two FEHs interconnected with a power hybrid (POH) on one side and with an optical readout hybrid (ROH) on the opposite side.
The 2S and PS modules integrate 2 types of custom ASICs (the bPOL12 and bPOL2V5) in a 2 stage DC-DC conversion scheme in order to deliver the required power to all the data acquisition and control ASICs of the modules. The total consumption of the 2S module when configured for data taking is close to 5W and the PS close to 10W. The voltages needed for the operation of the different ASICs are nominally 1.2V and 2.5V for the 2S case and the same plus 1.0V for the PS.
The module and hybrid designs need to guarantee power integrity for the full range of operating conditions, for all the different modules produced and for the lifetime of the detector operation. Three main parameters are affecting the module power integrity: The output voltage of the DC-DC converters, the effective module power distribution network resistance (including power and ground resistance and connector contact resistance) and finally the current consumption of all the ASICs on the module. Even when considering a fixed design for hybrids and ASICs there is great complexity that arises because of two reasons: First, none of these parameters are in fact stable in time or even the same between different ASICs, hybrids and modules and second, the very small operating voltage margins of the ASICs operating at such low nominal voltages.
The issue of module power integrity was considered since early in the prototyping phase and the hybrids went through multiple changes that targeted specifically the power integrity of the modules. These changes were initially guided by simulations. Later on, prototype module powering data were gathered in a systematic way. With the hybrids now in the production phase, all the information gathered during the prototyping phase from modules, hybrids and ASICs was used to make complete models regarding the module powering including all the parameters that affect it. With these models, the output voltage of the dc-dc converters could be chosen and a final tweaking of the module design could be performed optimizing for power consumption.
In this contribution the powering architecture and the historical evolution of it will be described along with the lessons learned for the 2S and PS modules. The problems encountered and the solutions implemented will be detailed. Finally, the final on-module powering strategy will be presented along with the data and modelling that led to it.
