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Luigi Gaioni (University of Bergamo and INFN Pavia (IT))03/10/2023, 13:40ASICPoster
This work is concerned with the design and the characterization of front-end channels, developed in a 28 nm CMOS technology, conceived for the readout of pixel sensors in future, high-rate applications at the next generation of large particle accelerators.
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Two front-end architectures are discussed. In the first one, an in-pixel flash ADC is exploited for the digitization of the signal,... -
Elisa RICEPUTI03/10/2023, 13:40ASICPoster
This work aims to describe the experimental performance of a module consisting of four Lithium-drifted Silicon (Si(Li)) detectors and their readout electronics, which is the main component of a tracker in an upcoming balloon experiment. The activity is carried out within the GAPS (General AntiParticle Spectrometer) collaboration, whose scientific objective is the indirect detection of dark...
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Matteo Migliorini (Universita e INFN, Padova (IT))03/10/2023, 13:40System Design, Description and OperationPoster
The Level-1 trigger scouting system of the CMS experiment aims at intercepting intermediate data produced by the L1 trigger processors, before the final trigger decision.
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This system can be complemented by adding the raw stream of data collected from the detector front-end, where the throughput is manageable. An implementation of the triggerless readout is realized by reading a sector of the... -
Jeremias Kampkötter03/10/2023, 13:40Power, Grounding and ShieldingPoster
The hfrh-buck (high frequency radiation hardened-buck) is a radiation hardened DC/DC-converter operating at a high switching frequency of 100MHz with a small air core inductor of 22nH. To ensure a high radiation dose, the circuit is designed with core transistors of a 65nm TSMC technology. By stacking the transistors of the power stage, the converter can be supplied with a voltage of up to...
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Hui Zhang03/10/2023, 13:40ASICPoster
A monolithic pixel sensor test chip for PANDA micro-vertex detector has been implemented in 180 nm HVCMOS technology on a high resistivity substrate. The sensor should have very high time resolution (1 ns sigma) and high dynamic range (up to 1000). The pixel electronics contains a Charge Sensitive Amplifier (CSA), a feedback circuit and two comparators. One comparator receives the fast signal...
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Angelo Loi (Universita e INFN, Cagliari (IT)), Angelo Loi03/10/2023, 13:40System Design, Description and OperationPoster
We present first results obtained with a prototype 4D-tracking demonstrator, using sensors and electronics developed within the TimeSPOT project, and tested on a positive charged pion beam at CERN SPS. The setup consists of six small tracking layers in a row, having area of about 3 mm squared each, three of which equipped with 3D-trench silicon sensors and three with 3D-column diamond sensors....
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Benjamin Huber (Technische Universitaet Wien (AT))03/10/2023, 13:40Trigger and Timing DistributionPoster
We present details on the new Level-1 Global Trigger at CMS for the upcoming high-luminosity operation of the LHC. Our focus is on the newly developed firmware, which employs a bottom-up generic approach to enhance menu adaptability and accommodate the increase in upstream information. We also highlight our efficient pipelining strategy that ensures excellent routability at 480 MHz....
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Dmitry Eliseev (Rheinisch Westfaelische Tech. Hoch. (DE)), Dr Dmitry Eliseev (Rheinisch Westfaelische Tech. Hoch. (DE))03/10/2023, 13:40Programmable Logic, Design and Verification Tools and MethodsPoster
High-speed multichannel ADCs are costly and require complex FPGA firmware to communicate with them. The Multi-Voltage Thresholding (MVT) approach can replace to some extent an external ADC with internal resources of an FPGA, thus reducing costs and complexity. The MVT approach needs only a few low-cost external components. The focus of the talk is presenting an open-source IP-Core that...
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Nicolas Striebig (KIT - Karlsruhe Institute of Technology (DE))03/10/2023, 13:40ASICPoster
A new application for monolithic pixel detectors is NASA’s AMEGO-X project [1], which is a low-orbit gamma ray observatory for multimessenger astrophysics, proposed as a 3 to 5 year mission. For the 40-layer gamma-ray telescope, which will consist of over 64000 sensors with a total area of more
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than 25 m², a new low power < 2 mW/cm2 and high dynamic range 20 – 600 keV monolithic active pixel... -
Ms Amanda Simone Krieger (Lawrence Berkeley National Lab. (US)), Ms Amanda Simone Krieger (Lawrence Berkeley National Lab. (US))03/10/2023, 13:40ASICPoster
A full characterization of the BigRock high-speed, low-power analog front end (AFE) will be presented. The BigRock AFE previously described in [1] has been refined in a second generation testbed ASIC, Pebbles. The AFE utilizes a current-mode signal path that has been designed for 4D tracking applications with precision time resolution of order 50 ps. The preamplifier concept is based on a...
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Milos Vojinovic (Imperial College (GB))03/10/2023, 13:40System Design, Description and OperationPoster
In preparation for the High-Luminosity era of the LHC, the CMS experiment will replace the existing calorimeter endcaps with a novel device - the High Granularity Calorimeter (HGCAL), having around six million readout channels. The electronics system for this upgrade project is highly specialised and complex, involving multiple layers of data transfer, so testing must be carefully planned. The...
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Stephen Goadhouse (University of Virginia (US))03/10/2023, 13:40Power, Grounding and ShieldingPoster
The development of the CMS Barrel Calorimeter Processor (BCP) for the high-luminosity LHC poses a challenge due to strict power requirements. To minimize the risk of performance degradations or component damage, a project-specific and inexpensive evaluation board has been designed with multiple DC power circuits to safely test and evaluate them outside of the expensive BCP. The planned tests...
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Tea Bodova (University of Bergen (NO))03/10/2023, 13:40Module, PCB and Component DesignPoster
University of Bergen is involved in developing two calorimeters: (1) the pixel section of the Electromagnetic Forward Calorimeter (FoCal-E) for the ALICE Upgrade and (2) the Digital Tracking Calorimeter (DTC) for the proton Computed Tomography (pCT) prototype. Both designs utilize the ALPIDE sensors which are connected to aluminum-polyimide flexible cables applying Single-point Tape Automated...
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Bontems William, Daniel Dzahini (Tima Laboratory / CNRS)03/10/2023, 13:40ASICPoster
The paper describes a new figure of merit reachable in term of very low power dissipation for a 12 bit, 40MS/s Analog to Digital Converter in a CMOS 65nm process with 1V power supply. A differential time interleaved successive approximations register architecture is used. Each individual ADC channel is optimized regarding power consumption hence parallelizing 28 ADC channels in an analog...
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88. Design of the OBELIX monolithic CMOS pixel sensor for an upgrade of the Belle II vertex detectorDr Thanh Hung Pham (Centre National de la Recherche Scientifique (FR) - Université de Strasbourg)03/10/2023, 13:40ASICPoster
The Belle II collaboration has initiated a program to upgrade its detector in order to address the challenges set by the increase of the SuperKEKB collider luminosity, targeting 6x1035 cm²s-1. A monolithic CMOS pixel sensor named OBELIX (Optimized BELLe II pIXel) is proposed to equip 5 detection layers upgrading the current vertex detector. Based on the existing TJ-Monopix2, OBELIX is...
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Dr Isar Mostafanezhad (Nalu Scientific, LLC)03/10/2023, 13:40ASICPoster
We present the architectural design, prototype fabrication and and first results for the High Pitch digitizer System-on-Chip (HPSoC). The HPSoC is a high channel density and scalable waveform digitization ASIC with an embedded interface to advanced high-speed sensor arrays such as e.g. AC-LGADs. The chip is being fabricated in 65nm technology and targets the following features:...
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Hulin Wang03/10/2023, 13:40ASICPoster
In this talk we report the R&D program underway at CCNU to develop a pixel chip for the readout of GEM detectors appropriate for use in the CSR external-target experiment (CEE) at HIRFL for beam monitoring. The chip offers simultaneous Time over Threshold (ToT) and Time of Arrival (ToA) measurements, with an event-driven readout mode. The chips were tested with injected pulses and a Fe-ion...
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Dr Nicolo Vladi Biesuz (Universita e INFN, Ferrara (IT))03/10/2023, 13:40Module, PCB and Component DesignPoster
We present the development of a data acquisition system dedicated to de-
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tectors using the Timepix4 ASIC, developed in 65nm CMOS technology by the
Medipix4 Collaboration, as integrated front-end.
A control board is needed for system configuration and data acquisition,
up to the maximum bandwidth of 160 Gbps. To avoid the need for multiple
custom boards, we designed a system based on... -
alessandro marras03/10/2023, 13:40ASICPoster
The CoRDIA project aims to develop an X-ray imager capable of continuous operation in excess of 100 kframe/s. The goal is to provide a suitable instrument for Photon Science experiments at diffraction-limited Synchrotron Rings and Free Electron Lasers considering Continuous Wave operation.
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Individual circuit blocks (adaptive-gain amplifier, analog-to-digital converter) were produced using a... -
Marcus Johannes Rossewij (Nikhef National institute for subatomic physics (NL))03/10/2023, 13:40ASICPoster
Upcoming upgrade of the ALICE Inner Tracking System (ITS3) foresees the use of wafer-scale MAPs bent into a cylindrical shape. Test beams employing the current ALICE Alpide chips, bent to foreseen ITS3 radii, showed that MAPs remain fully functional. However, some electrical effects, like (PS) power supply current changes and voltage shifts, were observed. The results suggest that these are...
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Mr Guillermo Plumed Asensio (Aragon Institute of Technology Itainnova (ES))03/10/2023, 13:40Power, Grounding and ShieldingPoster
This paper introduces a prototype of a GaN FET based 200 W DC-DC converter. Its design has been carried out to ensure optimal efficiency and minimal electromagnetic interference (EMI) issues that are commonly associated with the high switching frequency converters. To achieve this, hardware-in-the-loop (HIL) techniques have been used to enhance the control at high switching speed, and ANSYS...
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Mingjie Zhai (Chinese Academy of Sciences (CN))03/10/2023, 13:40Power, Grounding and ShieldingPoster
The High Granularity Timing Detector (HGTD) is an ATLAS Phase II upgrade project, the goal of which is to provide accurate time measurements for tracks to mitigate pile-up effect. DC/DC converters, BPOL12V, are implemented in the Peripheral Electronic Boards (PEB) and used to generate voltages for a bunch of ASICs. Due to the working environment constraints of HGTD, the BPOL12V will be...
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Dominik Gorni (Brookhaven National Laboratory)03/10/2023, 13:40ASICPoster
Data bandwidth, timing resolution and resource utilization in readouts of radiation detectors are constantly challenged. Event driven solutions are pushing against well-trenched framed solutions. The idea for an asynchronous readout architecture called EDWARD (Event-Driven With Access and Reset Decoder) was presented at the TWEPP 2021 conference. Here we show the progress of our work which...
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Mr Alessandro Iovene (CAEN SpA), Dr Ferdinando Giordano, Simone Ivo Selmi03/10/2023, 13:40Power, Grounding and ShieldingPoster
In this poster we present our approach to design power supplies that are resilient to magnetic field that can reach up to 1 T, we will illustrate the engineering challenge to have a power supply that can safely operate in radiation and magnetic fields. We will summarize the test we have performed starting from basic components like inductors, then sub-parts and complete modules. We will...
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Mr Gregory Bertolone (Centre National de la Recherche Scientifique (FR))03/10/2023, 13:40ASICPoster
FPGA prototyping enables hardware acceleration for ASIC verification. Cadence Protium, an FPGA based platform, enables ASIC designers to prototype their RTL code in an easy and automatically way. As the RTL codes stay untouched during the process, the Protium provides a reliable model of the ASIC for early developments of DAQ and control systems. Protium advanced Blackbox flow allows in...
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Amar Kapic (EPFL/CERN)03/10/2023, 13:40Radiation-Tolerant Components and SystemsPoster
In this presentation, we discuss a multi-channel radiation-tolerant and magnetic field-compatible humidity monitoring system developed for the needs of the CMS inner cold sub-detectors. The results of sensor irradiation tests, the tests conducted at different negative temperatures, and tests performed in the strong magnetic field are presented. Furthermore, a multi-channel readout unit has...
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Mattia Campana (Sapienza Universita e INFN, Roma I (IT))03/10/2023, 13:40System Design, Description and OperationPoster
The High-Luminosity phase of the CERN Large Hadron Collider will pose new challenges for the detectors. The Electromagnetic Calorimeter (ECAL) of the CMS experiment will be equipped with a completely new readout electronics to cope with increase in the number of pp collisions per bunch crossing, as high as 200, and higher noise induced by radiation. Two on-beam vertical integration tests were...
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Matei Vasile (IFIN-HH (RO))03/10/2023, 13:40Programmable Logic, Design and Verification Tools and MethodsPoster
RDMA communication is an efficient choice for many applications, such as data acquisition systems, data center networking and any other networking application where high bandwidth and low latency are necessary. RDMA can be implemented using a large array of options which need to be tailored to the needed use case in order to get optimal results. Aspects such as the effects of using multiple...
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Olivier Bourrion (Centre National de la Recherche Scientifique (FR))03/10/2023, 13:40System Design, Description and OperationPoster
A new Forward Calorimeter (FoCal) system has been proposed as part of the ALICE upgrades planned for LHC Run 4 which features a Si+W electromagnetic calorimeter. A first tower prototype corresponding to 1/5 of the nominal module of the electromagnetic calorimeter has been built in 2022. It is composed of 20 passive layers of tungsten absorber interleaved with 18 active layers of...
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Arseniy Vitkovskiy (Nikhef National institute for subatomic physics (NL)), Dr Arseniy Vitkovskiy (Nikhef ( the Dutch National Institute for Subatomic Physics )), Mr Marcel Rossewij (Utrecht University), Vladimir Gromov (Nikhef National institute for subatomic physics (NL))03/10/2023, 13:40ASICPoster
A new silicon tracker detector (ITS3) will be installed in ALICE Inner Tracking System during the LHC long shutdown 3. We develop a 10.24Gbps Data Serializer and Wireline Transmitter (GWT-PSI) circuit for the readout of the detector. A 16-to-1 multiplexer architecture achieves low power consumption (28mW) and avoids high-frequency (> 640MHz) clock signals in the circuit. A clock-cleaning PLL...
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Daisuke Hashimoto (Nagoya University (JP))03/10/2023, 13:40Radiation-Tolerant Components and SystemsPoster
Results are presented for gamma and neutron irradiation tests for SFP+ transceivers. The radiation tolerance of the electronics components used in the detector area is a key of the electronics systems at high energy physics experiments. We tested four types of SFP+ transceivers from Ficer. Gamma rays were irradiated up to O(100) Gy at the Cobalt-60 facility of Nagoya University. Neutrons were...
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Chenfan Zhang (University of Liverpool (GB)), Chenfan Zhang (University of Liverpool)03/10/2023, 13:40ASICPoster
This contribution presents results from the RD50-MPW family of monolithic High Voltage CMOS (HV-CMOS) pixel chips, which are developed by the CERN-RD50 collaboration to study this technology in view of the harsh requirements imposed by future hadron colliders on tracking systems. Parameters especially considered in this programme are radiation tolerance, time resolution and granularity. This...
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Simon Emanuel Waid (Austrian Academy of Sciences (AT))03/10/2023, 13:40Radiation-Tolerant Components and SystemsPoster
The extremely low dark current of silicon carbide (SiC) detectors, even after high-fluence irradiation, is utilized to develop a beam monitoring system for a wide range of particle range, i.e., from the kHz to the GHz regime. The system is completely built from off-the-shelve components and is focused on compactness and simple deployment. Beam tests on a 50 um thick SiC detector reveal, that...
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Alessandro Zimmaro (Universite Montpellier II (FR))03/10/2023, 13:40Radiation-Tolerant Components and SystemsPoster
This paper addresses the challenge of mitigating the effects of radiation on the electronic systems of the Large Hadron Collider (LHC) by introducing BatMon, a battery-powered, MCU-based wireless radiation monitoring system. The paper proposes software mitigation schemes that can be used alongside an external watchdog to guarantee higher availability of the application without impacting the...
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Rimsky Alejandro Rojas Caballero (University of Massachusetts (US))03/10/2023, 13:40Trigger and Timing DistributionPoster
The MDT Trigger Processor (MDTTP) is a key ATLAS Level-0 Muon trigger upgrade component designed to meet High-Luminosity LHC requirements. The MDTTP will use MDT hits in the trigger for the first in ATLAS to improve the momentum resolution of muon candidates provided by RPC and TGC detectors and reduce fake muon trigger rate.
The MDTTP hardware is based on the Apollo ATCA platform. The...
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Tom Williams (Rutherford Appleton Laboratory (GB))03/10/2023, 13:40Trigger and Timing DistributionPoster
For the High-Luminosity Large Hadron Collider era, the trigger and data acquisition system of the Compact Muon Solenoid experiment will be entirely replaced. Novel design choices have been explored, including ATCA platforms with SoC controllers and newly available interconnect technologies with serial optical links with data rates up to 28 Gb/s. Trigger data analysis will be performed through...
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Sanha Cheong (SLAC National Accelerator Laboratory (US))03/10/2023, 13:40System Design, Description and OperationPoster
The ATLAS collaboration will replace its inner detector by an all-silicon tracker (ITk) for the HL-LHC. The new pixel detector will cover a sensitive area of 13m$^2$. The pixel modules are loaded on light-weight carbon structures in the form of (half)rings and staves. Electrically functional prototypes of these local supports based on the RD53A readout chip were built and extensive...
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Fabio Cossio (INFN Torino (IT))03/10/2023, 13:40ASICPoster
A data conversion and compression ASIC, named LiTE-DTU, has been developed for the upgrade of the CMS electromagnetic calorimeter (ECAL) for the High-Luminosity phase of LHC. The ASIC integrates two 12-bit 160 MS/s ADCs, a data processing unit for gain selection and data compression, and a 1.28 Gb/s serializer.
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The ASIC has been extensively tested in laboratory and in beam tests showing... -
Katrin Elisabeth Penski (Ludwig Maximilians Universitat (DE))03/10/2023, 13:40ASICPoster
For the
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-II upgrade of the ATLAS Muon Spectrometer to the High Luminosity LHC
(HL-LHC), a new first-level muon track trigger is needed to make use of the high momentum
resolution of the Monitored Drift Tube (MDT). The current front-end electronics of the MDT
chambers do not meet these conditions, they have to be replaced. Therefore, a new ASD2
ASIC chip has been developed. Finally, 50000... -
Dr Jinyuan Wu (Fermi National Accelerator Lab. (US))03/10/2023, 13:40ASICPoster
A novel ultra-low-power front-end discriminator circuit for pixelized detectors, named pseudo-thyristor, is described. It is based on a positive feedback topology using regular CMOS transistors with zero static current, rather than constantly drawing current in typical discriminators. When a small charge is injected at the input, the circuit flips rapidly due to the positive feedback and...
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Tiehui Ted Liu (Fermi National Accelerator Lab. (US))03/10/2023, 13:40ASICPoster
The Endcap Timing ReadOut Chip (ETROC) is designed to process LGAD signals with time resolution down to about 40-50ps per hit. The ETROC2 is the first full size (16x16) prototype design with the front-end based on and scaled up from the ETROC1 (4x4). The readout designs at pixel and global level and the system interfaces are all new and are compatible with the final chip specifications in...
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Jie Zhang (Institute of High Energy Physics(IHEP), Chinese Academy of Sciences(CAS))03/10/2023, 13:40Module, PCB and Component DesignPoster
The HGTD is a novel detector introduced to augment the new all-silicon Inner Tracker in the pseudo-rapidity range from 2.4 to 4.0, adding the capability to measure charged-particle trajectories in time as well as space.
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A prototype of Peripheral Electronics Board (PEB), which supports up to 55 front-end modules with 12 lpGBT, 9 VTRx+ and 52 bPOL12v, is developed to work as a bridge between... -
Yifan Yang (Universite Libre de Bruxelles (BE)), Dr Yifan Yang (iihe, ULB)03/10/2023, 13:40System Design, Description and OperationPoster
The Jiangmen Underground Neutrino Observatory (JUNO) aims to determine the neutrino mass hierarchy by detecting antineutrinos from nuclear reactors using a large liquid scintillator volume. The detector uses around 20,000 20-inch photomultiplier tubes powered and read out by two electronics readout systems: underwater and above water. The back-end card (BEC) is a crucial component of the...
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Chihiro Kawamoto (Kyoto University (JP))03/10/2023, 13:40Trigger and Timing DistributionPoster
The status of the development of the Level-0 endcap muon trigger system for the ATLAS experiment at the HL-LHC is presented. Integrations of the new trigger algorithms and the implementation with firmware on a new prototype of the trigger board (Sector Logic, SL) are also presented. Results from hardware tests of the SL prototype board and integration tests with the newly developed front-end...
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