Conveners
ASIC
- Marcus Julian French (Science and Technology Facilities Council STFC (GB))
- Angelo Rivetti (Universita e INFN Torino (IT))
- Angelo Rivetti (INFN - National Institute for Nuclear Physics)
ASIC
- David Gascon (University of Barcelona (ES))
- Marcus Julian French (Science and Technology Facilities Council STFC (GB))
ASIC
- Marcus Julian French (Science and Technology Facilities Council STFC (GB))
- David Gascon (University of Barcelona (ES))
ASIC
- Marcus Julian French (Science and Technology Facilities Council STFC (GB))
- David Gascon (University of Barcelona (ES))
ASIC
- David Gascon (University of Barcelona (ES))
- Angelo Rivetti (Universita e INFN Torino (IT))
- Angelo Rivetti (INFN - National Institute for Nuclear Physics)
ASIC
- Angelo Rivetti (Universita e INFN Torino (IT))
- Marcus Julian French (Science and Technology Facilities Council STFC (GB))
- Angelo Rivetti (INFN - National Institute for Nuclear Physics)
ASIC
- Angelo Rivetti (Universita e INFN Torino (IT))
- Angelo Rivetti (INFN - National Institute for Nuclear Physics)
- David Gascon (University of Barcelona (ES))
The High Granularity Timing Detector (HGTD) for the ATLAS experiment, within the HL-LHC upgrade, uses Low Gain Avalanche Diode (LGAD) sensors for high-precision timing measurements.
AltirocA is the pre-production 225-channel readout ASIC, providing both luminosity and time-of-arrival measurements. The full system targets a resolution of 30 ps per hit initially and 70 ps after full...
The LiTE-DTU is an ASIC designed to digitize and transmit scintillation signals from the CMS Electromagnetic Calorimeter (ECAL) at HL-LHC. The chip was produced in TSMC 65 nm technology. The development process of the chip was not without hurdles, going through three prototype cycles and two engineering runs. Functionality and performance has been assessed in four test-beam campaigns. 96k...
The CMS High Granularity Calorimeter (HGCAL), developed for the HL-LHC, uses custom ASICs—HGCROC3 and H2GCROC3—to read out silicon sensors and SiPM-on-tile modules. These chips provide precise charge and timing measurements, digital processing for triggering, and are designed to operate in harsh radiation conditions. Version 3 of the chips implements all final features, with sub-versions A–E...
CoRDIA is an X-ray imager being developed, for Photon Science experiments at 4th generation Synchrotron Rings. Its goal is to be capable of continuous operation at 150k frame/s. Its Analog Front-End consists in a battery of adaptive-gain amplifiers and Analog-to-Digital converters, arranged in a pipelined, modular structure compatible with a compact pixel pitch (110um). A test structure has...
The FastRICH ASIC provides high-precision, triggerless readout for Upgrade-Ib of the LHCb RICH detectors. Demands of continuous data acquisition and varying hit rates across the detector impose unique challenges on the ASIC's design and verification. This work presents the verification strategy for FastRICH, focusing on functional correctness, timing performance, and operational robustness....
The TriglaV ASIC is a RISC-V-based SoC designed to address the requirements of future particle physics experiments. Fabricated in a TID-robust 28nm CMOS technology, it integrates fault-tolerance against single-event effects using TMR and ECC techniques. The architecture features a triplicated core, ECC-hardened memory blocks, hardened peripherals and interconnects. TriglaV was built via the...
The ARCADIA Main Demonstrator 3 (MD3), developed by the ARCADIA INFN collaboration, is a fully Depleted Monolithic Active Pixel Sensor in the LFoundry 110nm CIS technology. It features a custom backside process that allows for the full depletion of the high-resistivity substrate.
The first test beam on the MD3 was performed at the Fermilab Test Beam Facility in July 2024 with a 120 GeV...
This work presents the design challenges and characterization results of the novel 100µPET detector ASIC. The 100µPET project proposes an innovative scanner for small animals made of a stack of high-granularity, thin, full-reticle MAPS (30.2 x 22.8 mm²), and promises unprecedented volumetric resolution of 0.022 mm³. The chip features ~25k hexagonal pixels with 93 µm side in 130 nm SiGe...
The ALICE Inner Tracking System upgrade (ITS3) will employ stitched, wafer-scale Monolithic Active Pixel Sensors (MAPS) for the first time in a high-energy physics detector. The first stitched prototype, the Monolithic Stitched Sensor (MOSS), underwent testing that confirmed yield compliance with ITS3 requirements. Linearity between time-over-threshold and deposited energy was validated from...
The MOST (Monolithic Stitched Sensor with Timing) is a 25.9\,cm-long wafer-scale pixel sensor prototype that bridges generic R\&D for future High Energy Physics (HEP) detectors with the developments aimed for the ALICE Inner Tracking System (ITS3).
Its main purpose is to investigate the yield of high-density pixel architectures, assess the timing capabilities of asynchronous readout,...
The ALICE 3 Time of Flight detector requires a time resolution below 20 ps to allow for electron and charged hadron identification from 15 MeV/$c$ (forward e/$\pi$ separation) to 4 GeV/$c$ (p/K separation).
The expected event rate, of about 280 kHz/cm$^2$, makes monolithic CMOS sensors very attractive.
However, their time resolution is still far from the experiment needs.
A solution is to...
The goal of our project is to develop technology that enables large-scale particle detectors with 3D-integrated ASIC designs to achieve 10 μm position and 10 ps precision timing resolutions. The sensors used in this application are based on Low-gain avalanche diodes (LGADs), developed in a standard foundry CMOS process. We also developed a readout ASICs to match these sensors in the TSMC 28 nm...
Dephy is a research and development project supported by the IN2P3 institute, aiming to investigate the technologies required for the development of small-pixel detectors for trackers in future particle accelerators. Among its objectives, the project focuses on designing pixel readout circuits with high timing resolution, capable of operating in extreme radiation environments. For...
There are no existing SPICE models that account the effects of radiation doses exceeding 1 GRad in global transistor-level simulations for analog design in 28 nm CMOS technology within Electronic Design Automation environments. We present RAD-BSIM, the first SPICE model based on Berkeley Short-channel IGFET Model (BSIM) leveraging gate-oxide capacitance variations to enable robust circuit...
Superconducting nanowire single-photon detectors (SNSPDs) are promising candidates for novel particle detectors offering picosecond timing resolution, but are difficult to scale to large arrays. We present a 32-channel cryo-CMOS ASIC, fabricated in a 22nm FDSOI process, designed for tight integration with SNSPDs and operation at 4K. The ASIC targets 8.0ps RMS timing accuracy across 32 channels...
This work presents the results of proof-of-concept ASIC implementing a novel TDC based on Time-to-Amplitude Converter (TAC) architecture demonstrating a best-case precision of 0.83 ps in a compact area (~0.021 mm²) and with low power (~2.6 mW per channel) making it suitable for high-density integration, typical of HEP applications.
It performs a time interval measurement between events by...
We present the design and first test results for SPIDER_v0, the first ASIC prototype in CMOS TSMC 65nm designed for the time measurement path of LHCb Electromagnetic Calorimeter after LS4 Upgrade. The main requirements are a time resolution of 15ps, and an occupancy up to 30% (12 Mevent/s).
SPIDER_v0 is a 2-channel waveform digitizer allowing time reconstruction by digital algorithms. The...
We present a Skipper-in-CMOS image sensor integrating Skipper-CCD non-destructive readout with CMOS pinned photodiode gain and in-pixel processing. Fabricated in a 180 nm process, a 200×200 array with 15×15 μm² pixels achieves 0.075e⁻ noise via multisampling. The SPROCKET2 ROIC, in 65 nm CMOS, supports 66.7 ksps high-speed readout with low DNL/INL and 10 μV resolution. A 20,000-pixel SPROCKET2...
Wafer-scale monolithic active pixel sensors (MAPS) for particle detectors face significant
challenges in on-chip data transmission due to high resistance and capacitance in CMOS
interconnects, leading to signal distortion, attenuation, dispersion, and inter-symbol
interference (ISI). This contribution outlines these issues in the ALICE ITS3 MOSAIX chip and
presents current solutions by...
This contribution presents a co-simulation methodology that unifies sensor and front-end circuit modelling for pixel detectors. Traditional simplified signal models often fail to represent realistic particle-induced transients, leading to discrepancies between design-time assumptions and actual performance. The simulation chain enables simulation of a large number of realistic events,...
