We present the measurements of offset, noise and gain uniformity of a prototype pixel detector readout ASIC designed in CMOS 130nm. The chip works in a single photon counting mode, consists of 23552 pixels of 75 um pitch and forms a matrix of 184 x 128. A single pixel consists of a charge sensitive preamplifier with a feedback discharge circuit, shaper, trimming DACs and threshold setting blocks, two discriminators and two 14-bit ripple counters. All these elements fit into pixel area of 75 um×75 um. When a multi-thousand pixel matrix is designed, the mismatch between readout channels is one of the design top priorities. Here, the shaper and the threshold trim blocks play critical roles and they are discussed in more detail. We propose several levels of offsets trimming in each pixel individually namely:
- trim DAC controlled by 7 bits to tune the IDAC current,
- control of tuning range in two different ways: by multiplying the current IDAC by factor n and/or by changing base current in the source followers,
- by adding an extra offset at the input.
The ASIC was measured for offset, noise and gain uniformity and trimming capability, which will be presented. In order to be used in an experiment or a final X-Ray detector device it was tested for radiation hardness. Two ASICs were placed in the high intensity X-Ray generator for 27 hours and 237 hours respectively. The distance between the X-ray source to the ASIC was 250mm. The X-ray generator with Mo rotating anode target was running at 60kV-300mA. Each chip received of about 3.7k rad each minute per pixel. The offset, noise and gain uniformity was measured each hour.
Summary
The measured offset spread from pixel to pixel of the IC can be reduced from the level of about σ = 16.8 mV rms down to σ = 0.74 mV rms which is less than 12 e- rms. taking into account the gain. The equivalent noise charge measured is of 89 e- rms. To distinguish between the input pulses of different amplitudes (generated in the detectors by the X-ray photons of different energies), then the spread of the gain dominates. In our solution the mean gain is trimmed to the value of 63 µV/e- with the spread of 3% rms. The summarized performance of the IC together with comparison to other world’s top designs will be presented.
The results of offset, gain and noise uniformity before, during (every hour) and after high intensity irradiation (3.7k Rad per pixel each minute) of the ASIC with the energy of mainly 17.5keV and continuous X-ray, or Bremsstrahlung, up to 60kV will be presented. Preliminary data analysis proves radiation hardness of our solution with minor changes of the analog parameters and no digital blocks damage is visible.
