Speaker
Mr
Sverre Jarp
(CERN)
Description
In the CERN openlab we have looked at how well LHC software matches the execution capabilities of
current and, to some extent, future processors. Thanks to current silicon processes, transistor counts in
the billions (10^9) have become commonplace and microprocessor manufacturers have been deploying
transistors in multiple ways to increase performance. In this talk I will review the various architectural
enhancements we have observed in the past and comment on the usefulness for HEP software. I will also
make some suggestions for tuning our software, and finally speculate on how well our software will fit
some of the possible future processor designs.
Summary
Sverre Jarp is CTO in the CERN openlab, a joint collaboration with leading industrial partners in order
to assess cutting-edge information technology for the Large Hadron Collider's Computing Grid. He has
been working in computing at CERN for over 30 years and has held various managerial and technical
positions promoting advanced but cost-effective computing solutions. S. Jarp holds a degree in Theoretical
Physics from the Norwegian University of Science and Technology in Trondheim.
