Jun 5 – 10, 2016
Padova, Italy
Europe/Rome timezone

The ALICE C-RORC GBT card, a prototype read-out solution for the ALICE upgrade.

Jun 6, 2016, 2:15 PM
30m
Palazzo Bo (Padova)

Palazzo Bo

Padova

Oral presentation Upgrades Upgrades 1

Speaker

Filippo Costa (CERN)

Description

ALICE (A Large Ion Collider Experiment) is the detector system at the LHC (Large Hadron Collider) optimized for the study of heavy-ion collisions at interaction rates up to 50 kHz and data rates beyond 1 TB/s. Its main aim is to study the behavior of strongly interacting matter and the quark gluon plasma. ALICE is preparing a major upgrade and starting from 2021, it will collect data with several upgraded sub-detectors (TPC, ITS, Muon Tracker and Chamber, TRD and TOF). The ALICE DAQ read-out system will be upgraded as well, with a new read-out link called GBT (GigaBit Transceiver) with a max. speed of 4.48 Gb/s and a new PCIe gen.3 x16, interface card called CRU (Common Read-out Unit). Several test beams have been scheduled for the test and characterization of the prototypes or parts of new detectors. The test beams usually last for a short period of one or two weeks and it is therefore very important to use a stable read-out system to optimize the data taking period and be able to collect as much statistics as possible. The ALICE DAQ and CRU teams proposed a data acquisition chain based on the current ALICE DAQ framework in order to provide a reliable read-out system. The new GBT link, transferring data from the front-end electronics, will be directly connected to the C-RORC, the current read-out PCIe card used in the ALICE experiment. The ALICE DATE software is a stable solution in production since more than 10 years. Moreover, most of the ALICE detector developers are already familiar with the software and its different analysis tools. This setup will allow the detector team to focus on the test of their detectors and electronics, without worrying about the stability of the data acquisition system. An additional development has been carried on with a C-RORC-based Detector Data Generator (DDG). The DDG has been designed to be a realistic data source for the GBT. It generates simulated events in a continuous mode and sends them to the DAQ system through the optical fibers, at a maximum of 4.48 Gb/s per GBT link. This hardware tool will be used to test and verify the correct behavior of the new DAQ read-out card, CRU, once it will become available to the developers. Indeed the CRU team will not have a real detector electronics to perform communication and performance tests, so it is vital during the test and commissioning phase to have a data generator able to simulate the FEE behavior. This contribution will describe the firmware and software features of the proposed read-out system and it will explain how the read-out chain will be used in the future tests and how it can help the development of the new ALICE DAQ software.

Primary author

Co-authors

Adam Tadeusz Wegrzynek (Warsaw University of Technology (PL)) Adriana Telesca (CERN) Mr Barthelemy Von Haller (CERN) Csaba Soos (CERN) Franco Carena (CERN) Giuseppe Simonetti (Ludwig-Maximilians-Univ. Muenchen (DE)) Heiko Engel (Johann-Wolfgang-Goethe Univ. (DE)) Mr Jeremy Niedziela (CERN) Pierre Vande Vyvre (CERN) Roberto Divia (CERN) Sylvain Chapeland (CERN) Tivadar Kiss (Hungarian Academy of Sciences (HU)) Ulrich Fuchs (CERN) Vasco Chibante Barroso (CERN) Wisla Carena (CERN)

Presentation materials