The CMS Silicon Tracker will produce large amounts of data, which must be read out by
the Front End Drivers (FEDs), which are 9U 400mm VME64x cards that process the raw
data from a subset of 192 APV25 silicon readout ASICs, equivalent to 0.2% of the
tracker. After multiplexing and streaming, the data from the tracker are routed via
analogue optical links to the FEDs. 96 optical channels are then digitised to 10bit
precision at 40MHz and processed in large FPGAs, before being collated into events
and sent to the CMS DAQ via either VME or the SLINK-64 protocol.
Under final running conditions the SLINK-64 protocol must be used to enable a data
throughput of up to 200 Mbytes/s per FED. It is clear therefore that such a system
must be well tested before the final system is assembled at Point 5 on the LHC ring,
so that the final operation of the system is certified. However, during the testing
and assembly stages in 2006 there are not enough Tracker front-end modules available
in order to drive a large enough number of FEDS to make a true vertical slice test.
Nominally a vertical slice would consist of 1 whole crate of FRLs, which corresponds
to two whole crates of FEDs ~ 32 in total. Therefore another method of testing the
readout system without the need for the detector modules is required. This is
achieved by creating Pseudo-Random fake events within the front-end modules of the
FEDs themselves, which are injected directly into the FED exactly where the optical
data samples would arrive from the final system.
In order to qualify the hardware readout system and operation of the DAQ, this system
was set up in building 904 on the CERN Prevessin site. This system is capable of
creating variable event occupancies in the front end of the FED, without the need for
the actual detector modules to create the event frames from the APV25 front-end
readout chips. The “fake events” which are created in the FED have the capability to
be set to operate at any occupancy between 0 and 100% and also include a pseudo
random adjustment to the pedestals of the fake APV frames, in order to simulate the
random nature of the hits in the front-end silicon detector modules.
The main purpose of this test is to qualify the functionality of the entire trigger
and readout chain from the LTC – TTCci – TTCex – TTCoc – APVE – FMM – FRL – FED –
Transition Card - Slink Sender Card and DAQ software. Operating the system under
various conditions by varying the trigger rate and data throughput (occupancy). In
doing so one can investigate the limiting factors of the system to gain a better
understanding of how the final tracker will perform.
The results of this test have shown that the system is stable for periods of time
over many hours when running at 150KHz Poisson distributed triggers, the back
pressure from the APVE and FED, via the FMM, works perfectly to throttle the trigger
rate down to a sustained rate of 72Khz when operating the FED at 5% occupancy. At
lower occupancies, 2-3%, more representative of nominal data taking conditions in the
final Tracker, the system runs without interruption at trigger rates around 100 KHz
sustained. A number of other scenarios have also been tested and will be presented in
the paper, and if time permits, some nominal testing of the same system with real
detector modules will also be included.