Franco MALOBERTI
(University of Pavia)
28/09/2006, 09:45
Oral
Modern and future ultra-deep-submicron technologies
make challenging the analog design especially when
power consumption must match digital counterparts.
The decrease of the supply voltage reduces the voltage
headroom in analog circuits, the gate leakage current
increases, the voltage gain decreases in planar bulk
transistors, 1/f noise deteriorate when using new high-
k gate...