Speaker
Description
The ATLAS experiment at CERN has started the construction of upgrades
for the "High Luminosity LHC", with collisions due to start in
2026. In order to deliver an order of magnitude more data than
previous LHC runs, 14 TeV protons will collide with an instantaneous
luminosity of up to 7.5 x 10e34 cm^-2s^-1, resulting in much higher pileup and
data rates than the current experiment was designed to handle. While
this is essential to realise the physics programme, it presents a huge
challenge for the detector, trigger, data acquisition and computing.
The detector upgrades themselves also present new requirements and
opportunities for the trigger and data acquisition system.
The approved baseline design of the TDAQ upgrade comprises: a
hardware-based low-latency real-time Trigger operating at 40 MHz, Data
Acquisition which combines custom readout with commodity hardware and
networking to deal with 5.2 TB/s input, and an Event Filter running at
1 MHz which combines offline-like algorithms on a large commodity
compute service augmented by hardware tracking. Commodity servers and
networks are used as far as possible, with custom ATCA boards, high
speed links and powerful FPGAs deployed in the low-latency parts of
the system. Offline-style clustering and jet-finding in FPGAs, and
track reconstruction with Associative Memory ASICs and FPGAs are
designed to combat pileup in the Trigger and Event Filter
respectively.
This paper will report recent progress on the design, technology and
construction of the system. The physics motivation and expected
performance will be shown for key physics processes.
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