This paper presents the design and test results of a radiation tolerant PLL ASIC as part of the optical link ASICs in the Nuclotron-based Ion Collider Facility (NICA) front-end readout electronics. To obtain low DC leakage current and reduce dynamic mismatch, the charge pump uses two unity-gain feedback operational amplifiers to keep the output common mode voltage constant. The LCVCO employs a novel capacitor array structure to improve the Q degradation due to the source/ drain leakage current from the binary controlled MOS transistor. All adjustable bits can be controlled by the SPI module, which is also strengthened with the Triple Modular Redundancy (TMR) structure. The PLL covers a wide-frequency range from 4.5GHz to 5.6GHz, consuming a total power of 25 mW from the post layout simulation. At 5.12GHz, the phase noise is -115 dBc/Hz @ 1MHz offset. The chip has been taped out and the tests are planned to be conducted in this March. The test results will be reported in the meeting.
|TIPP2020 abstract resubmission?||No, this is an entirely new submission.|
|Funding information||General Program of National Natural Science Foundation of China (Grant No. 11875145).|