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Description
The MUX64 ASIC is a 64-to-1 analog multiplexer developed to expand the ADC input channels in the peripheral electronics of HGTD for the ATLAS Phase-II upgrade. The MUX64 chips will be used in the radiation field of high-luminosity pp collisions at LHC to an integrated luminosity of 4000 fb-1. The radiation hardness of MUX64 have been tested with 80 MeV protons and X-ray exposures for damages caused by NIEL and TID, respectively. The irradiated samples have shown tolerance to withstand the NIEL to a fluence of 3.21 × 1015 (Si 1 MeV neq/cm2), and the TID of 0.746 MGy (Si).
Summary (500 words)
The High Granularity Timing Detector (HGTD) is developed for the ATLAS Phase-II upgrade to resolve high-luminosity event pileups. The detector modules are made with Low Gain Avalanche Detectors (LGAD) sensors which will be operated at -20 ℃. The detector operation requires monitoring on temperatures of the sensors and voltage drops of biases connected by flexible cables. The monitoring signals in analog format are read by the ADC channels of the lpGBT on the Peripheral Electronics Board (PEB).
To accommodate the large number of monitoring channels, a 64-to-1 multiplexer (MUX64) is design to reduce input channels to the lpGBT ADC. The MUX64 accommodates 64 analog inputs to one analog output. One of the inputs is selected by a 6-bit decoder for connection to an lpGBT ADC channel. The dynamic range of the input signal to MUX64 ranges from 0 to 1.0V, and the on-resistance (RON) between the selected input channel and the output must be less than 900 Ω to achieve the required resolution.
The HGTD detector vessels are located in the endcap regions of the ATLAS at a distance of 3.5 m from the interaction point. The MUX64’s on the PEB’s are distributed around 0.8 m from the beam pipe center. The radiation tolerance is required for operation in the high-luminosity operation of LHC with the integrated luminosity of up to 4000 fb^-1. The PEB’s will be exposed to Non-Ionizing Energy Loss of 2.50×10^15 (1 MeV n_eq/cm^2, and the Total Ionizing Dose of 0.497 MGy. The radiation hardness of MUX64 were tested with the on-resistance of all 64 inputs examined in the nominal operation condition.
The NIEL test has been conducted with 80 MeV protons at the Associated Proton Experiment Platform (APEP) of the China Spallation Neutron Source (CSNS). Two open-cavity chips were irradiated to a fluence of 3.21×10^15 (Si 1 MeV n_eq)/cm^2. The on-resistances responded to input signals ranging from 0.05-1.2 V were examined for deviation. On-resistance of one of the MUX64 chip had increased up to 14 Ω, and the other up to 25 Ω. The NIEL test shows MUX64 chips satisfy the requirement of HGTD.
The TID tests were conducted in an X-ray facility equipped with a MultiRad160 X-ray machine. The test samples included an open-cavity chip and a QFN88 packaged chip, which were irradiated to 0.746 MGy (Si) at a dose rate of 5.98 Gy/s (Si). After the irradiation these chips were kept for annealing, in room-temperature for 24-hour, and were later heated at 100 ℃ for 168 hours. The on-resistance of the 64 input channels of each MUX64 were also measured with input voltages range from 0.05 to 1.2 V. Both MUX64s have shown negligible deviation in response to TID. The radiation hardness of MUX64 can fulfill the requirement for HGTD.
