Speakers
Description
The INFN-Retina project aims at developing a fast track finding system prototype capable to operate at 40 MHz event rate with hundreds of track per event, for the high-luminosity LHC experiments. A tracking system prototype to be tested on beam has been built as practical demonstrator. In this work, we present the testbeam results of an embedded tracking system prototype based on artificial retina algorithm, capable to reconstruct tracks in real time with a latency <1 μs and with track parameter resolutions that are comparable with the offline results. The maximal event rate that the telescope can accept is 1.1 MHz and it is determined by the Beetle readout chip. The test was carried out using a 180 GeV/c proton beam at the CERN SPS. The tracking system prototype consists of 8 planes of single-sided silicon sensors with 512 strips each and 183 μm pitch; the active area of the sensor is about 100 cm2 with 500 μm thickness.
A custom data acquisition (DAQ) board based on Xilinx Kintex 7 FPGA has been developed. It manages the readout of the ASICs, the sampling of the analog channels, and the retina algorithm implementation. The FPGA resources have been divided among the different modules of the retina architecture: approximately 10% for the switch module that routes the data to appropriate cellular units for the processing stage, 50% for the pool of engines that evaluate how well a set of hits matches with a specific track hypothesis, and 10% for the track parameter determination, keeping the rest for backup. This configuration allows to realise more than 1000 cellular units working in parallel at a clock frequency of the system greater than 200 MHz. Testbeam results will be presented and compared with simulations, in particular for the tracking performance. Perspective for the future will be also discussed.
