Speaker
Matthew Noy
(CERN)
Description
The NA62 GigaTracKer (GTK) is a hybrid pixel detector required to time MIPS to better than 200ps (RMS) with a material budget of less than 0.5% $X_0$. I will introduce the GigaTracker Readout ASIC (TDCPix) designed to respond to these requirements, giving some detail about the main challenges, the architectural choices made during the design, the measured performance of the ASIC and detector assembly, as well as what we believe limits the time resolution. If time permits, I will compare and contrast the GTK electronics with those required for the CMS HGCAL upgrade project front end electronics.
Author
Matthew Noy
(CERN)