# 12th Workshop on Electronics for LHC and future Experiments

Sep 25 – 29, 2006
Valencia, Spain
Europe/Zurich timezone

## Wafer test of the LHCb Outer Tracker TDC-Chip

Sep 27, 2006, 4:20 PM
1h 40m
Valencia, Spain

#### Valencia, Spain

IFIC – Instituto de Fisica Corpuscular Edificio Institutos de Investgación Apartado de Correos 22085 E-46071 València SPAIN
Poster

### Speaker

Jan Knopf (Ruprecht-Karls-Universitat Heidelberg)

### Description

The OTIS-TDC is a 32 channel time to digital converter chip developed in Heidelberg for the LHCb Outer Tracker experiment. Designed in a 0,25 $\mu m$ CMOS process, it can measure times with a resolution better than 1\,ns. As the chip is directly mounted to its board, the test have to be performed on the wafer itself. As the testing period for 7\,000 chips was only three weeks, many test routines have been implemented on a FPGA. The tests are described and results presented on overall yield and performance.

### Summary

The LHCb Outer Tracker consists of 55\,000 drift tubes.
The gas amplified signal created by the drift electrons is further processed by a
Pre-amplifier.
The result is a pseudo LVDS signal, which is fed into the OTIS-TDC chip.
This chip was developed in Heidelberg and is produced in a 0,25 $\mu m$ CMOS process.
It is able to measure the arrival time with a resolution better than 1\,ns on 32
channels simultaneously.
As this chip is directly mounted on a board, various tests have to made to ensure the
functionality.

In order to test the chips within a short time period while getting a full
characterization nearly all test routines were implemented on a FPGA.
The FPGA Firmware analysis the incoming data resulting in various histograms.
Only these histograms are then read out via the PCI-Bus to the PC.
To benefit from the 1\,MHz readout scheme of LHCb, the trigger, reset and clock
generation were also implemented on the FPGA.

The test setup was the build using two PCs.
The first PC controlled the FPGA via a LABVIEW application.
The second PC was in charge of the infrastructure and overall control of the test.
Also running a LABVIEW application it took care of the power supply, the wafer tester
itself, the measurement of the analog voltages and power consumption.
The data exchange between the two PCs was realized by using the UDP protocol

With this setup it was possible to test 47 wafer containing about 7000 Chips
altogether within three weeks.
The time to test one chip alone was about one minute.
From this MPW-run we got 6000 working chips while the experiment is in need for 2000
chips.
Therefore all chips for the front-end electronics of the LHCb Outer Tracker has been
produced.

### Primary author

Jan Knopf (Ruprecht-Karls-Universitat Heidelberg)

### Co-authors

Dr Dirk Wiedner (Ruprecht-Karls-Universitat Heidelberg) Mirco Nedos (Universitat Dortmund) Ralf Muckerheide (Ruprecht-Karls-Universitat Heidelberg) Dr Ulrich Trunk (Ruprecht-Karls-Universitat Heidelberg) Prof. Ulrich Uwer (Ruprecht-Karls-Universitat Heidelberg) Dr Uwe Stange (Ruprecht-Karls-Universitat Heidelberg)

### Presentation materials

 Paper Poster