Sep 25 – 29, 2006
Valencia, Spain
Europe/Zurich timezone

Design and Test of the Off-Detector Electronics for the CMS Barrel Muon Trigger

Sep 26, 2006, 12:35 PM
25m
Valencia, Spain

Valencia, Spain

IFIC – Instituto de Fisica Corpuscular Edificio Institutos de Investgación Apartado de Correos 22085 E-46071 València SPAIN

Speaker

Luigi Guiducci (Istituto Nazionale di Fisica Nucleare (INFN))

Description

Drift Tubes chambers are used in the CMS barrel for tagging the passage of high Pt muons generated in a LHC event and for triggering the CMS data read out. The Sector Collector system synchronizes the track segments built by trigger modules on the chambers and deliver them to reconstruction processors (Track Finder, TF) that assemble full muon tracks. Then, the Muon Sorter has to select the best four candidates in the barrel and to filter fake muons generated by the TF system redundancy. The hardware implementations of the Sector Collector and Muon Sorter systems satisfy radiation, I/O and fast timing constraints using several FPGA technologies. The hardware was tested with custom facilities, integrated with other trigger subsystems, and operated in a beam test. Constraints, design, test and operation of the modules will be presented.

Summary

In CMS barrel, the Drift Tubes (DT) chambers for muon detection were designed to be
used in the trigger system. The first stage of DT Muon Trigger is the Local
Trigger, i.e. electronics mounted on chambers, that processes DT hits to find track
segments. Local trigger data are collected by the Sector Collector (SC) system,
located on detector nearby "towers".
Each SC module handles chamber links from one sector of the detector and performs
data reduction and synchronization. Spy features allow trigger data to be
transmitted to the DT readout modules for inclusion in the readout data. Finally,
the SC is able to return a trigger signal to each chamber of the sector, generated
as a boolean function of the trigger bits received from the single chambers. In
this way a sector-level complete trigger system is implemented.
SC modules are built by several units: a VME 9U motherboard, hosting a board
controller device that provides the VME interface, the interconnection with the
readout system and the sector trigger generation; four mezzanine cards, receiving
data from the four chambers of the sector; and a fifth mezzanine card, hosting
serializer (GOL) chips and the optical drivers for the fiber connection to the
counting room.
In the counting room, segment data are used by the Track Finder system to build
full muon tracks. In the last stage, the Muon Sorter (MS) selects the highest
transverse momentum muons in the barrel region. The high redundancy and efficiency,
granted by the partitioning of the Track Finder, generates, as a by-product, fake
tracks. The MS can run a fake suppression algorithm that can reduce the fake track
rate down to 0.5%. After fake suppression, the best four muons are selected among
all muon candidates in the barrel (up to 144), according to rules that privilege
high reconstruction quality and high transverse momentum.
Muon Sorter algorithms are performed in two stages, with two different hardware
modules. The first stage is based on Wedge Sorters (WS). Each WS module collects
all muons found in a longitudinal 30° section (wedge) of the barrel detector and
sorts up to two muons to ensure dimuon efficiency. Final sorting of the four best
candidates in the barrel is performed by a single board, the Barrel Sorter (BS).
The hardware implementation of the systems profits of custom processors implemented
on FPGA devices using VHDL programming. The different requirements have been
satisfied with several different technology choices. The SC system is based on
flash-FPGAs, ensuring high fault immunity in a moderate radiation environment. The
MS system located in the underground counting room has no requirements on radiation
tolerance, thus it is based on sram-FPGAs that provide very large I/O and
computational power on single devices, simplifying the design of the modules.
In order to validate the designs through exhaustive tests, adapter boards were
designed to emulate the final operation using custom general purpose I/O modules,
Pattern Units (PU). Test setups allow data patterns to be injected at 40 MHz into
boards and to read back and check outputs. Custom VME and JTAG software performs
bonding checks, dynamic tests, device programming and board parameters
configuration.
After stand-alone tests, modules were integrated with other subsystems to validate
the interconnection and the synchronization. A full test of the DT Trigger
electronics system has been performed at the CERN SpS with a dedicated muon beam
pulsed at 25 ns frequency. The trigger electronics chain, comprising prototypes or
final parts of the SC and MS systems, could be effectively synchronized and
operated.

Primary author

Luigi Guiducci (Istituto Nazionale di Fisica Nucleare (INFN))

Co-authors

Alessandro Montanari (Istituto Nazionale di Fisica Nucleare (INFN)) Fabrizio Odorici (Istituto Nazionale di Fisica Nucleare (INFN)) Giovanni Torromeo (Istituto Nazionale di Fisica Nucleare (INFN)) Giuliano Pellegrini (Istituto Nazionale di Fisica Nucleare (INFN)) Marco Dallavalle (Istituto Nazionale di Fisica Nucleare (INFN)) Riccardo Travaglini (Istituto Nazionale di Fisica Nucleare (INFN))

Presentation materials