12th Workshop on Electronics for LHC and future Experiments

Session

Parallel Session B4-Trigger & DAQ session 1

B4

27 Sept 2006, 11:20

Valencia, Spain

102. Recent developments on th ALICE central Trigger processor

Orlando Villalobos Baillie (University of Birmingham)

27/09/2006, 11:20

Oral

The ALICE Central Trigger Processor is designed to process signals from triggering detectors and send appropriate trigger signals and data to participating detectors. The ALICE system allows dynamic partitioning of the detector, past-future protection appropriate to each detector's electronics, and a number of different monitoring and diagnostic functions. The system has now...

103. Timing in the ALICE trigger system

Roman Lietava (University of Birmingham)

27/09/2006, 11:40

Oral

In this paper we discuss trigger signals synchronisation and trigger input alignment in the ALICE trigger system. The synchronisation procedure adjusts the phase of the input signals with respect to the local Bunch Crossing (BC) clock and, indirectly, with respect to the LHC bunch crossing time. Alignment assures that the trigger signals originating from the same bunch crossing...

58. The ALICE silicon pixel detector read-out electronics

Marian Krivda (Institute of Experimental Physics, Kosice, Slovakia)

27/09/2006, 12:00

Oral

The ALICE silicon pixel detector (SPD) constitutes the two innermost layers of the ALICE inner tracker system. The SPD contains 10 million pixels organized in 120 detector modules (half staves) connected to the off-detector electronics via bidirectional optical links. The front-end data streams are processed in 20 readout modules (Router), based on FPGAs, each carrying three 2-channel...

78. The ALICE Silicon Pixel Detector Control system and online calibration tools

Ivan Amos Cali (Universita degli Studi di Bari / CERN)

27/09/2006, 12:20

Oral

The ALICE Silicon Pixel Detector (SPD) contains nearly 10^7 hybrid pixel cells. About 2000 parameters and ~50000 DACs must be controlled in real-time during the detector integration, commissioning and operation. Information on each channel is stored in a configuration database. Timing and data management are critical issues. An overview of the SPD detector control system is presented,...

60. The Level 0 Pixel Trigger System for the ALICE Silicon Pixel Detector

Gianluca Aglieri Rinella (CERN European Organization for Nuclear Research, Geneva)

27/09/2006, 12:40

Oral

The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted together with data on 120 optical links using the G-Link protocol. The Level 0 Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor within a...