Speaker
Description
The CMS Phase-1 Pixel Detector was designed to cope with an instantaneous luminosity 2e34 cm-2 s-1 and 25 ns bunch spacing with very small efficiency loss. The upgraded detector has one additional hit coverage featuring 4 barrel layers and 3 endcap disks, almost doubling the pixel count to 124M. DCDC converters were used to deliver more power to the detector without the need of replacing the cable plant. CO2 based cooling was implemented and carbon based structures were used to reduce material in the tracking volume. The data acquisition (DAQ) system was upgraded to accept higher event rates and a new, digital data format from the detector front ends. The detector was installed in early 2017 and has been successfully operated since. The LHC is now going through a planned long shutdown period during 2019-2020. The pixel detector was extracted in early 2019 after the end of Run-2 data taking and has been kept cold to protect the silicon sensors. The innermost barrel layer will be replaced during this shutdown period and will feature improved ASICs and circuit boards to rectify issues discovered during data taking. This talk will focus on the operational experience of the detector in 2018, highlighting the detector performance and addressing the lessons learned. The current status of the detector and the refurbishment plan will also be discussed.
