Conveners
Sensor/ASICs technology: Hybrids 1
- Simon Spannagel (CERN)
Sensor/ASICs technology: Hybrids 2
- Simon Spannagel (CERN)
Sensor/ASICs technology: CMOS 1
- Sven Wonsak (University of Liverpool (GB))
Sensor/ASICs technology: CMOS 2
- Sven Wonsak (University of Liverpool (GB))
Sensor/ASICs technology: Front-end electronics
- Frank Meier (Ruprecht Karls Universitaet Heidelberg (DE))
SOI is a CMOS LSI technology to insulate each MOSFET by using a thin oxide layer in the silicon wafer, allowing high-performance CMOS circuit because of the low parasitic capacitance. The SOI pixel sensor utilizes the silicon wafer as the radiation sensor. Because of the small detector capacitance and the industry-standard CMOS technology, high-performance pixel sensors can be developed.
In...
In the development of pixel detectors for the HL-LHC ATLAS Inner
Tracking Detector upgrade (ITk), thin and finer granularity pitch planar
pixel detector has been developed by HPK/KEK and is ready for the
production. The hybridization optimization was started using the FE-I4
ASIC (250um x 50um pitch) for the current ATLAS pixel detector. Recently
a half size but final pitch readout ASIC,...
The Timepix4 chip is the new hybrid pixel detector ASIC designed at CERN in the frame of the Medipix4 collaboration. This new chip will consist of an array of 512x448 pixels with 55 um square pixels. The chip is highly configurable in order to cover a large range of applications and it can be programmed to work in particle tracking mode or in frame based mode. In particle tracking mode the...
Depleted Monolithic Active Pixel Sensors (DMAPS) in commercial High Voltage-CMOS (HV-CMOS) processes are groundbreaking tracking detectors for particle physics experiments, as they offer a competitive and cost-effective solution over a large range of applications. In spite of the major improvements demonstrated by DMAPS during the last few years, these sensors require further research...
High Voltage Monolithic Active Pixel Sensors (HVMAPS) are based on
a commercial High Voltage CMOS process and collect charge by drift
inside a reversely biased diode. HVMAPS represent a promising technology for
future pixel tracking detectors.
Two recent developments are presented. The Mupix has a continuous readout and
was developed for the Mu3e experiment whereas the ATLASpix has a...
The upgrade of the ATLAS tracking detector for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies.
The MALTA Monolithic Active Pixel Sensor prototypes have been developed with the 180 nm TowerJazz CMOS imaging technology. This combines the engineering of high-resistivity substrates with on-chip high-voltage biasing to...
The key ingredient to enhance the radiation tolerance and timing precision for CMOS pixel sensors is to achieve a fully depleted sensitive layer, where the charge collection is guided by strong drifting field. Such sensor concepts have been progressively demonstrated by recent R&D achievements with monolithic prototypes in large formats. These sensors are often referred to as DMAPS (Depleted...
This work discusses the design and the main results relevant to the characterization of analog front-end processors in view of their operation in the pixel detector readout chips of ATLAS and CMS at the High-Luminosity LHC. The front-end channels presented in this paper are part of RD53A, a large scale demonstrator designed in a 65 nm CMOS technology by the RD53 collaboration. The...
Abstract: The large increase of pile-up interactions is one of the main experimental challenges for the HL-LHC physics program. A powerful new way to mitigate the effects of pile-up is to use high-precision timing information to distinguish between collisions occurring close in space but well-separated in time. A High-Granularity Timing Detector (HGTD) , based on low-gain avalanche detector...
