Quantum Gate Pattern Recognition and Circuit Optimization for Scientific Applications

20 May 2021, 10:50
13m
Short Talk Offline Computing Quantum Computing

Speaker

Koji Terashi (University of Tokyo (JP))

Description

There is no unique way to encode a quantum algorithm into a quantum circuit. With limited qubit counts, connectivities, and coherence times, circuit optimization is essential to make the best use of near-term quantum devices. We introduce two separate ideas for circuit optimization and combine them in a multi-tiered quantum circuit optimization protocol called AQCEL. The first ingredient is a technique to recognize repeated patterns of quantum gates, opening up the possibility of future hardware co-optimization. The second ingredient is an approach to reduce circuit complexity by identifying zero- or low-amplitude computational basis states and redundant gates. As a demonstration, AQCEL is deployed on an iterative and efficient quantum algorithm designed to model final state radiation in high energy physics. For this algorithm, our optimization scheme brings a significant reduction in the gate count without losing any accuracy compared to the original circuit. Additionally, we have investigated whether this can be demonstrated on a quantum computer using polynomial resources. Our technique is generic and can be useful for a wide variety of quantum algorithms.

Primary authors

Wonho Jang (University of Tokyo (JP)) Koji Terashi (University of Tokyo (JP)) Masahiko Saito (University of Tokyo (JP)) Christian Walter Bauer (Lawrence Berkeley National Lab. (US)) Ben Nachman (Lawrence Berkeley National Lab. (US)) Yutaro Iiyama (University of Tokyo (JP)) Tomoe Kishimoto (University of Tokyo (JP)) Ryunosuke Okubo (University of Tokyo (JP)) Ryu Sawada (University of Tokyo (JP)) Junichi Tanaka (University of Tokyo (JP))

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