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Description
In this work the potentiality of Negative Capacitance Transistors (NC-FET) will be explored thanks to advanced TCAD (Technology Computer Aided Design) modelling. The goal is to investigate the suitability of innovative negative capacitance devices to be used in High Energy Physics experiments detection systems, featuring self-amplificated segmented, high granularity detectors. This fosters the fabrication of tracking devices featuring high spatial resolution and extremely thin layers, with very low parasitic capacitance (intrinsic and extrinsic).
Within this framework, MFM (Metal-Ferroelectric Material-Metal) and MFIM (Metal-Ferroelectric-Insulator-Metal) capacitors have been deeply investigated within the TCAD environment, by comparing simulation findings with experimental measurements. The strength of this approach is to exploit the behavior of a simple capacitor to accurately ad-hoc customize the TCAD library aiming at realistic simulation of ferroelectric materials. Fig.1 shows the Polarization and Electric Field within a MFM capacitor with a ferroelectric layer of 7.7 nm [1].
The comparison between simulations and measurements in terms of Polarization as a function of the applied bias voltage for both MFM and MFIM devices (Fig.2) has been used for model and methodologies validation purposes. The P-V hysteresis is typical for MFM devices. The analysis and results obtained for MFIM capacitors can be straightforwardly extended to the study of NC-FETs. Their optimization leads to a non-hysteretic behavior, due to the negative capacitance stabilization on the wider operation voltage range by achieving a matched design of the ferroelectric layer and the MOS capacitors [2-5]. The Ginzburg-Landau-Khalatnikov equation, which provides a reliable description of ferroelectric material properties in terms of a free energy F expanded as a power series in the ferroelectric polarization P can be accounted for within the TCAD environment.
This work would support the use of the TCAD modelling approach as a predictive tool to optimize the design and the operation of the new generation NC-FET devices for the future High Energy Physics experiments in the HL-LHC scenario.
[1] M. Hoffmann et al., 2018 IEEE International Electron Devices Meeting IEDM, 18-727 (2018).
[2] Íñiguez, J., et al., Nat Rev Mater 4 (2019), 243–256.
[3] M. Kao et al., IEEE Electron Device Letters, vol. 40, no. 5 (2019), 822-825.
[4] J. Jo et al., 2016 IEEE Silicon Nanoelectronics Workshop (2016), 174-175.
[5] H. Agarwal et al., IEEE Electron Device Letters, vol. 40, no. 3 (2019), 463-466.
The author acknowledges funding from INFN-CSN5 Young Researcher Grant (NegHEP project).
