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Francois Vasey (CERN), Mrs Heather Hofmeister (RWTH Aachen University), Lutz Feld (RWTH Aachen University)20/09/2010, 14:00
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Bernhard Spaan (Fachbereich Physik - Universitaet Dortmund)20/09/2010, 15:00Oral
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Karlheinz Meier (Kirchhoff-Institut fur Physik (KIP))20/09/2010, 15:20We will present an overview of current major electronics projects carried out by German groups in the framework of the S-LHC, b-factories and future linear colliders. Cooperations with other scientific fields like hadron physics, medical physics and biophysics will be shown. Finally, the challenge of maintaining a competitive infrastructure for the development of advanced electronics...Go to contribution page
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Prof. Lutz Feld (RWTH Aachen University)20/09/2010, 15:40OralThe physics department of RWTH Aachen University has a long tradition in particle physics. Today, four institutes are active in this field, three in experiment and one in theory. A common focal point is LHC physics. All experimental institutes have contributed to the construction of the CMS experiment, mainly to the silicon tracker, muon system and computing, and are now analysing the data....Go to contribution page
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Patrick Michel Puzo (Laboratoire de l''Accelerateur Lineaire (LAL) (IN2P3) (LAL))20/09/2010, 16:30Oral
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Peter Goettlicher (Deutsches Elektronen Synchrotron (DESY))20/09/2010, 17:15OralThe European free electron laser (EuXFEL) facility will generate coherent and intense X-ray flashes at rates up to 27000 per second. X-rays flashes are generated by passing bunches of electrons, accelerated to 17.5GeV by a superconducting linear accelerator, through magnetic undulators in which electrons emit X-ray flashes by a SASE lasing process. Each flash is intense enough to produce a...Go to contribution page
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Dr Ralph Assmann (CERN)20/09/2010, 18:00OralThe Large Hadron Collider is presently in its first year of operation for High Energy Physics. The status of beam operation is discussed, presenting the evolution of beam parameters, achieved performance, beam energy and delivered luminosity. Expected and observed limitations are analyzed and the plans for further increases in LHC intensity, luminosity and beam energy are reviewed. Both...Go to contribution page
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Roland Weigand (ESA)21/09/2010, 09:00Integrated circuits (IC) used in a space environment are exposed to solar and cosmic radiation, causing several adverse effects in the IC. Total Ionising Dose (TID) effects may lead to threshold voltage shift, increased leakage currents and reduced circuit speed. With advanced (deep-) sub-micron technologies, TID is of decreasing concern for most of the space applications (~ 100 krad) and...Go to contribution page
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Ms Costanza Cavicchioli (CERN)21/09/2010, 09:50Systems. Planning, installation, commissioning and running experienceOralThis paper describes the tests and measurements made during the final commissioning of the ALICE Silicon Pixel Detector (SPD) in the first year operation with beams and the optimization of its performance. The ALICE Silicon Pixel Detector (SPD) is the innermost detector of the ALICE experiment. It consists of two cylindrical layers of pixel detectors, with a total of ~10^7 pixels. The...Go to contribution page
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Dr David Gascon (Universitat de Barcelona (ICC-UB))21/09/2010, 09:50A fully differential wideband amplifier for the camera of the Cherenkov Telescope Array (CTA) is presented. This amplifier would be part of a new ASIC performing the digitization at 1-3 GS/s with a dynamic range of 16 bits. Input amplifiers have a voltage gain up to 20 and a bandwidth of 400 MHz. Being impossible to design an 8 GHz GBW fully differential operational amplifier in a 0.35 um CMOS...Go to contribution page
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Mr Jens Verbeeck (K.U. LEUVEN)21/09/2010, 10:15In this work a voltage amplifier with a gain-bandwidth (GBW) product of 2.5Ghz utilizing adaptive biasing has been designed, using a standard CMOS technology. The amplifier was tested under gamma-radiation and temperature and features a gain degradation of 4,5 % up to a total dose of 100kGy and 5.6 % within a temperature range of -40 till 130°C. Finally the importance of including the...Go to contribution page
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Mr Paolo De Remigis (INFN sez. di Torino)21/09/2010, 10:15Systems. Planning, installation, commissioning and running experienceOralThe electronic readout architecture for the silicon pixel sensors of the PANDA Micro Vertex Detector is presented. The pixels will provide timing, position and energy information; moreover, no trigger signal is foreseen, thus leading to a huge amount of data to be transmitted. The foreseen readout system is based on a custom ASIC development, named ToPiX, which provides time information via a...Go to contribution page
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Dr Andreas Sabellek (KIT - Karlsruhe Institute of Technology)21/09/2010, 11:00Systems. Planning, installation, commissioning and running experienceOralThe Alpha Magnetic Spectrometer (AMS-02) will measure primary cosmic ray particle and gamma ray spectra on board the International Space Station. A transition radiation detector (TRD) provides the capability to identify positrons and antiprotons. Space qualified electronics, developed for the TRD, supply its 5248 proportional counter tubes with high voltage and read out all channels running on...Go to contribution page
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Mr Ludovic Raux (Laboratoire de l'Accélérateur Linéaire (Orsay) / OMEGA)21/09/2010, 11:00SPIROC embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, dual gain, 36-channel ASIC which allows to measure on each channel the charge...Go to contribution page
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Mrs Eva Vilella (University of Barcelona)21/09/2010, 11:25The high sensitivity and excellent timing accuracy of Geiger-mode Avalanche PhotoDiodes makes them ideal sensors for particle tracking pixel detectors in high energy physics experiments. However, it is well known that they suffer from dark counts which in practice enlarge the necessary area of the readout electronics. Dark count can be dramatically reduced lowering the bias overvoltage of the...Go to contribution page
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Peter Lichard (CERN)21/09/2010, 11:25Systems. Planning, installation, commissioning and running experienceOralThe NA62 straw detector, made of 7200 cylindrical straws, is a combined spectrometer and veto detector, which is part of the NA62 experiment at the CERN SPS accelerator. A new version of the full read-out system has been designed and tested on a detector prototype. A description of this system will be given, as well as test results and plan for future scaling.Go to contribution page
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Mr Jan Kaplon (CERN)21/09/2010, 11:50We present a 16 channel front end prototype implemented in 90nm CMOS IBM process and optimized for 5pF input capacitance. A primary motivation for this project is to study the usefulness of the CMOS technologies below 130nm for front end amplifiers optimized for short strip silicon detectors on Super LHC experiments. On the example of presented design we will show critical aspects of the front...Go to contribution page
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Mr Magnus Mager (CERN)21/09/2010, 11:50Systems. Planning, installation, commissioning and running experienceOralA large volume (90 m^3) Time Projection Chamber (TPC) is exploited at the dedicated heavy ion experiment ALICE ("A Large Ion Colliding Experiment") at CERN LHC as the main tracking detector. Equipped with 557,578 active read-out channels distributed over 4,356 Front-End Cards (FECs) and two endplates of 1.8-5 m in diameter, it is designed to track up to 20,000 particles emerging from a single,...Go to contribution page
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Mr Deepak Gajanana (NIKHEF)21/09/2010, 12:15A number of possible techniques exists for detecting high energy neutrinos from space. The most widely exploited method is the detection of neutrinos in large volumes of water or ice, using the Cherenkov light from the muons and hadrons produced by neutrino interactions with matter around the detector. A photon sensor (photo multiplier tube aka PMT) is housed in a glass sphere (aka Optical...Go to contribution page
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Dr Jan Buytaert (CERN)21/09/2010, 12:15Systems. Planning, installation, commissioning and running experienceOralThe LHCb detector and its electronics architecture are optimized for the measurement of b-physics at LHC. The current detector is complete and taking data, and will run at a luminosity of 2 x 10^32 cm-2s-1 to collect around 6fb-1. It is expected to reach this target around 2016 and hence a programme is already underway towards an upgrade of the detector and its electronics systems at this...Go to contribution page
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Mr Jean-Francois C. GENAT (University of Chicago)21/09/2010, 12:40In the scope of time of flight measurements at the scale of a few pico-seconds, a CMOS fast sampler chip is being developed in a 130nm CMOS technology. It includes a 10-20GS/s timing generator comprising a Delay Locked Loop and programmable sampling windows, and four channels of 256 sampling cells able to record up to of 25 ns of analog information. An input discriminator triggers the freezing...Go to contribution page
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Ivo Polak (Institute of Physics, Prague)21/09/2010, 12:40Systems. Planning, installation, commissioning and running experienceOralWe will report on several versions of the calibration and monitoring system for the SiPM-based scintillator tile hadron calorimeter for the ILC. Built and tested in the beam, the 1 m3 calorimeter prototype, uses 7600 SiPMs embedded in the small scintillator tiles and represents the biggest up-to date detector equipped with these new and perspective photodetectors. SiPMs requires a highly...Go to contribution page
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Kholdoun TORKI (CMP)21/09/2010, 14:153D-IC integration world is a rapidly growing where several scientific communities and companies are addressing important R&D resources. Among them the HEP community, through the FermiLab action who made in the few last years a significant leapfrog offering some fabrication’s runs. The number of events and publications in this field is also growing significantly. CMP is a non-profit /...Go to contribution page
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Mr Giovanni Mazza (INFN sez. di Torino)21/09/2010, 15:05The silicon tracker of the NA62 experiment requires the measurement of the particles arrival time with a resolution better than 200 ps rms and a spatial resolution of 300 um. A time measurement technique based on a Time to Amplitude Converter has been implemented in an ASIC in order to prove the possibility of integrate a TDC with resolution better than 200 ps in a pixel cell. Time walk...Go to contribution page
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Mr Paul Timmer (Nikhef)21/09/2010, 15:05The described system is developed in the framework of a deep-sea submerged Very Large Volume neutrino Telescope where photons are detected by a large number of Photo Multiplier Tubes [2]. These PMTs are placed in optical modules (OM). A basic Cockcroft-Walton (CW) voltage multiplier circuit design is used to generate multiple voltages to drive the dynodes of the photomultiplier tube. To...Go to contribution page
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Dr Federico Faccio (CERN)21/09/2010, 15:30The development of a custom radiation-tolerant DCDC converter ASIC is under way, aiming at an input voltage of 10V and an output power up to 8W. CMOS technologies for the development have been tested for radiation, and two of them satisfied the specifications even for upgraded trackers to SLHC levels. The design of 2 ASIC prototypes is presented, with measurements indicating that both the...Go to contribution page
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Dr Andre Konrad Kruth (Physics Department, University of Bonn)21/09/2010, 15:30GOSSIPO-3 is the demonstrator of a front-end chip for the read-out of Micro Pattern Gas Detectors designed in IBM 130 nm CMOS in collaboration of Nikhef and the Physics Department Bonn. The prototype features charge sensitive amplifiers, discriminators, a high resolution Time to Digital Converter, Low Drop Out voltage regulators for supply voltage control of the TDC, biasing circuits and...Go to contribution page
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Dr Gianluca Traversi (University of Bergamo and INFN Pavia)21/09/2010, 15:55This work is concerned with the design of analog circuits for processing the signals from deep n-well (DNW) monolithic CMOS sensors. The DNW MAPS approach takes advantage of the properties of triple well structures to lay out a sensor with relatively large area (as compared to standard MAPS) read out by a classical processing chain for capacitive detectors. Recently, a very promising approach...Go to contribution page
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Dr John Matheson (Rutherford Appleton Laboratory)21/09/2010, 15:55Future detector systems will face technical difficulties with the supply of electrical power to a multitude of sub-detectors. The Serial Powering (SP) scheme is an elegant solution which leads to a great reduction in cable mass, whilst increasing efficiency and reducing cost. In recent years, substantial developments in SP have been made by the ATLAS Tracker Upgrade Community. Initial...Go to contribution page
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Dr Matthew Noy (CERN)21/09/2010, 16:45The architecture and characterisation of the End Of Column readout chip for the NA62 GigaTracker hybrid pixel detector will be presented.This chip must perform time stamping to 100 ps (RMS) or better, provide 300 µm pitch position information and operate with a dead time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator ASIC comprises a full test column with 45 pixels alongside other...Go to contribution page
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Dr Katja Klein (I. Physikalisches Institut (B), RWTH Aachen University)21/09/2010, 16:45The CMS experiment foresees the deployment of DC-DC buck converters in its pixel and strip tracker upgrades, to facilitate the supply of the required currents with the installed cable plant and with a minimal amount of material. We have developed DC-DC buck converters based on radiation-tolerant ASICs from the CERN electronics group. Their performance in terms of power efficiency and...Go to contribution page
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Laura Gonella (Universität Bonn)21/09/2010, 17:10Powering of future trackers at SLHC requires low current distribution for high power efficiency and low material budget. In this framework, we investigate a serial powering scheme for the ATLAS pixel detector at SLHC. A dedicated regulator has been prototyped and largely characterized, both as single device and in a serial powering configuration. System aspects, such as AC-coupled module...Go to contribution page
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Tomasz Hemperek (Physikalisches Institut - Universität Bonn)21/09/2010, 17:10This article elaborates on a novel pixel readout system-on-chip (SoC) that has been designed to meet the ever increasing demands of the present and future generation of LHC pixel detectors. The FE-I4 architecture has higher luminosity and rate capability as well as a smaller single pixel area compared to its predecessors and is currently the most complex chip designed for particle physics...Go to contribution page
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Georges Blanchot (CERN)21/09/2010, 17:35The development of front-end systems for the ATLAS tracker at the sLHC is now in progress and the availability of radiation tolerant buck converter ASICs enables the implementation of DC to DC converter based powering schemes. The front-end systems powered in this manner will be exposed to the radiated and conducted noise emitted by the converters. The electromagnetic compatibility between DC...Go to contribution page
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Dr Christine HU-GUO (DRS-IPHC (IReS), University of Strasbourg, CNRS-IN2P3)21/09/2010, 17:35A pixel detector, composed of two layers of high resolution Monolithic Active Pixel Sensors (MAPS), is being designed for the STAR Heavy Flavor Tracker (HFT) upgrade. It allows topological identification of D mesons in heavy ion collisions at RHIC. The sensor chip: named ULTIMATE, is optimized for the ultimate phase of the upgrade in terms of resolution, power consumption and radiation...Go to contribution page
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David Lynn (Brookhaven National Laboratory)21/09/2010, 18:00Oral
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Cristian Fuentes (CERN, UTFSM)21/09/2010, 18:15Oral
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Fernando Arteche (Instituto Tecnológico de Aragón)21/09/2010, 18:30Oral
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21/09/2010, 18:45Oral
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Mr Mark Ritter (IBM US)22/09/2010, 09:00Large, parallel systems have been employed by scientists for both computation and data collection, but performance scaling now relies on chip and system-level parallelism. This has happened because power density limits have caused processor frequency growth to stagnate, driving the new multi-core architecture paradigm, which would seem to provide generations of performance increases as...Go to contribution page
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Mr Raymond S. Larsen (SLAC)22/09/2010, 09:50Systems. Planning, installation, commissioning and running experienceOralThe PICMG xTCA for Physics Specifications Extensions nearing completion are being tested in linac controls applications at DESY (EU XFEL) and at SLAC (ILC R&D, LCLS). New standard crate and module prototypes have been developed through industry partners while a flexible controls architecture is emerging based on a few powerful generic AMC modules backed by application-specific µRTMs. The...Go to contribution page
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Prof. K.K. Gan (The Ohio State University)22/09/2010, 09:50The LHC at CERN will be upgraded in two phases to increase the design luminosity by a factor of ten. The ATLAS experiment plans to add a new pixel layer to the current pixel detector during the first phase of the upgrade. The optical data transmission will also be upgraded to handle the high data transmission speed. A new driver and receiver ASIC has been designed for this new generation of...Go to contribution page
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Eric Shearer Hazen (Department of Physics-Boston University-USA)22/09/2010, 10:15Systems. Planning, installation, commissioning and running experienceOralWe are developing a MicroTCA Carrier Hub card which will provide timing, control and data acquisition functions in a MicroTCA crate for SLHC readout electronics. This module may be mounted in the primary or redundant MCH slot in a MicroTCA crate, and distributes low-jitter LHC RF clock and encoded fast timing signals to up to 12 AMC modules. In addition, it receives buffer status signals and...Go to contribution page
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Laurent Royer (Lab. de Physique Corpusculaire (LPC)-IN2P3-Pole Michrau)22/09/2010, 10:15A very-front-end chip dedicated to high granularity calorimeters has been designed and its performance measured. This electronics is composed of a low-noise Charge Sensitive Amplifier followed by a bandpass filter based on a gated integrator. This shaper performs intrinsically the analog memorization of the signal before its delayed digital conversion. The analog-to-digital conversion is...Go to contribution page
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Mr Jochen Knopf (Heidelberg University)22/09/2010, 11:00The international DEPFET collaboration is developing a low mass vertex detector (PXD)for the future BELLE-II experiment at the SuperKEKB particle accelerator in Japan. The PXD is based on monolithic arrays of DEPFETs which are read out in a rolling shutter mode. The Drain Current Digitizer ASIC (DCD-B) is used for reading out this detector matrix. It provides 256 channels of Analog-Digital...Go to contribution page
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Mr Erich Frahm (University of Minnesota/CMS)22/09/2010, 11:00Systems. Planning, installation, commissioning and running experienceOralWe will discuss our recent experiences designing and testing a prototype MicroTCA card for HCAL Trigger and Readout at SLHC. Our second generation prototype uses a Xilinx XC5VFX70T FPGA to perform the high-speed communication and data processing for up to 8 Readout Module fibers that are streaming data at 4.8 Gbps each. The FPGA also uses two SFP+ optical interfaces at 6.4 Gbps each for data...Go to contribution page
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Dr Gregory Michiel Iles (Imperial College, London)22/09/2010, 11:25Systems. Planning, installation, commissioning and running experienceOralA demonstrator for a level-1 trigger system has been designed and manufactured. The prototype card uses the AMC double width form factor, 5Gb/s links and a Xilinx XC5VTX150T or XC5VTX240T FPGA. Testing of the prototype is in an advanced stage. Results on the performance will be presented.Go to contribution page
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Mr PAULO MOREIRA (CERN)22/09/2010, 11:25In the framework of the GigaBit Transceiver project (GBT), a prototype of the GBT-SERDES ASIC has been developed. In charge of the serialization-deserialization of the data, including Reed-Solomon encoding, clock recovery, precise PLLs and complex frame-alignment procedure, this chip has been designed in a commercial 130nm CMOS technology to sustain high radiation doses and operate at 4.8...Go to contribution page
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Jean-Pierre Cachemiche (Centre de Physique des Particules de Marseille)22/09/2010, 11:50Systems. Planning, installation, commissioning and running experienceOralThe LHCb experiment envisages to upgrade its readout speed from 1 MHz to 40 MHz. The consequence for the electronics is higher densities and an increase of serial links speed. Moreover the architecture must be reviewed to cope with links carrying data, clock and slow control at the same time. Relying on boards compliant with the xTCA standard, we demonstrate how it is possible to build a...Go to contribution page
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Dr Vladimir Zivkovic (NIKHEF Institute)22/09/2010, 11:50This paper describes an original Design-for-Test (DfT) architecture implemented in the ATLAS FE-I4 pixel readout System-on-Chip (Soc) to accommodate the higher quality demands of future generation LHC detectors. To ensure that the highest possible number of fault-free devices is used during the experiment, the so-called production test to detect faulty devices after the manufacturing has to be...Go to contribution page
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Datao Gong (Southern Methodist Univeristy)22/09/2010, 12:15A high speed, low power 16:1 serializer is developed using a commercial 0.25 μm silicon-on-sapphire CMOS technology. It operates from 4.0 to 5.8 Gbps in the lab test. Its total jitter is measured to be 62 ps and the bathtub scan demonstrates a 122 ps opening at BER of less than 10-12 level at 5 Gbps. The measured power consumption is 507 mW at this data rate. A proton test of this chip is...Go to contribution page
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Mikihiko Nakao (KEK)22/09/2010, 12:15Systems. Planning, installation, commissioning and running experienceOralAt the Belle II upgrade of the Belle experiment at KEKB, we expect about20 kHz level-1 trigger rate at the design luminosity of 8 times 10^34/cm^2/s. The Belle II data acquisition system is designed to read out the data from the entire detector at up to 30 kHz, with minimum amount of deadtime of several percent that is unavoidable due to hardware constraints. The system consists of subsystems...Go to contribution page
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Matthias Wittgen (Stanford Linear Accelerator Center (SLAC))22/09/2010, 12:40Systems. Planning, installation, commissioning and running experienceOralThe RCE DAQ system is based on System-On-Chip building Blocks (RCEs) residing in Virtex-4/5 FPGAs and hosted within an ATCA based ecosystem with generic high bandwidth capabilities and 10-GE support. User applications in C++ run on the PowerPC core of the RCEs under the real-time operating system RTEMS. We will present a new application of these flexible DAQ building blocks targeted for the...Go to contribution page
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Mr Michal Bochenek (CERN)22/09/2010, 12:40We present designs and hopefully the first test results of two DC-DC switched capacitor converters developed in 0.13μm technology. Both circuits will be used as the building blocks in the power distribution system proposed for the upgraded ATLAS Inner Detector.Go to contribution page
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Piet de Moor (IMEC)22/09/2010, 14:15Although CMOS technology has a proven track record in terms of performance, there are limitations of a single chip (and even more of a full system containing many chips) in terms of the traditionally lateral interconnects. The past years a lot of R&D was spent to develop 3D interconnect and integration technologies such as high density bump interconnects, through Si vias and advanced...Go to contribution page
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Tiankuan Liu (Department of Physics-Southern Methodist University (SMU))22/09/2010, 15:05This paper presents the design, production quality assurance, integration, installation and commissioning of the optical link system for the ATLAS Liquid Argon Calorimeter front-end electronics readout. Operation experience and the recent problems with the optical transmitters are discussed. Also presented are the up-to-date results in searching for failure modes, experiences gained in that...Go to contribution page
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Mr Sami Vaehaenen (CERN)22/09/2010, 15:05Conventional bumping processes use electroplating for under bump metallization (UBM) and solder deposition. This process is laborious, involves time consuming photolithography, can only be performed using whole wafers and is therefore expensive in low volumes. In the low-cost development work, electroless deposition of UBM and novel solder ball placement techniques are studied as substitutes...Go to contribution page
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Mr Ashley Greenall (The University of Liverpool)22/09/2010, 15:30The design and performance of prototype single-sided modules with ABCN-25 front-end chips and 10x10 cm2 Hamamatsu silicon strip sensors is presented. A low mass module assembly has been achieved by gluing a single-sided flex circuit, with read out chips, directly onto the sensor. The design exploits the embedded shunt regulation within the ABCN-25 providing for a distributed and scalable...Go to contribution page
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Csaba Soos (CERN)22/09/2010, 15:30SLHC experiment upgrades will make substantial use of optical links to enable high-speed data readout and control. The Versatile Link project will develop and assess optical link architectures and components suitable for deployment at SLHC. The on-detector element will be bidirectional opto-electronic module: the Versatile Transceiver (VTRx) that will be based on a commercially available...Go to contribution page
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Dr Annie Xiang (Southern Methodist University)22/09/2010, 15:55This paper presents simulation and experimental studies of optical power penalties on the Versatile Link, the common R&D project on high-speed optical link for SLHC. It also presents how the 10 GbE fiber link model is incorporated into the Versatile Link system level specification. Receiver sensitivity tests on multi-mode and single-mode fibers over different fiber lengths are demonstrated....Go to contribution page
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Michael Beimforde (Max-Planck-Institut fuer Physik)22/09/2010, 15:55The on-going production of a demonstrator module for the ATLAS pixel detector upgrade is presented, exploiting thin planar pixel sensors as well as vertical integration technologies developed at the Fraunhofer Institute –IZM in Munich. The Solid-Liquid-InterDiffusion (SLID) technique is employed as an alternative to the bump-bonding process, to connect thin pixel sensors to the ATLAS FE-I3...Go to contribution page
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Kostas Kloukinas (CERN)22/09/2010, 16:45Oral
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Tobias Flick (Bergische Universitaet Wuppertal)22/09/2010, 16:45
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Dr Gregory Michiel Iles (Imperial College), Jean-Pierre Cachemiche (Faculte des Sciences de Luminy), Magnus Hansen (CERN), Mr Raymond S. Larsen (SLAC)22/09/2010, 16:45OralThis is the first session of the eventual xTCA working group and everybody are invited to participateGo to contribution page
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Dr Sandro Bonacini (CERN)22/09/2010, 17:00Oral
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Ken Wyllie (CERN)22/09/2010, 17:05Oral
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22/09/2010, 17:15
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Francois Vasey (CERN)22/09/2010, 17:15Oral
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22/09/2010, 17:20Oral
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Federico Faccio (CERN), Dr Sandro Bonacini (CERN)22/09/2010, 17:30Oral
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Francois Vasey (CERN)22/09/2010, 17:30Oral
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Prof. K.K. Gan (The Ohio State University)22/09/2010, 17:40Oral
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Jingbo Ye (Southern Methodist University, Department of Physics)22/09/2010, 17:50Oral
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22/09/2010, 18:00Oral
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Prof. K.K. Gan (The Ohio State University)22/09/2010, 18:15
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22/09/2010, 18:30Oral
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Andrea Dainese (INFN Padova)23/09/2010, 09:00The Large Hadron Collider (LHC) will collide lead nuclei in November 2010. Three experiments will collect data during the heavy-ion run: ALICE, which is the dedicated heavy-ion experiment, ATLAS, and CMS. After the successful commissioning and proton-proton data taking phases, these experiments will face the new challenge posed by the extreme conditions of Pb-Pb collisions, with envisaged...Go to contribution page
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Louis Lauser (Physikalisches Institut, Albert-Ludwigs-Universität Freiburg)23/09/2010, 09:50The Recoil-Proton Detector at COMPASS is built to identify protons of DVCS-processes and to trigger on the recoil particle. A front-end module was designed that allows both precise digitization of photomultiplier signals and real-time data-processing. With GANDALF, signals of 16 channels are converted by 12-bit 500 MHz ADCs, zero-time approximation is accomplished by DSP-algorithms in a...Go to contribution page
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Daniele Dequal (Università degli studi di Padova)23/09/2010, 09:50The ICARUS-T600 detector at LNGS is the first large mass Liquid Argon TPC (LAr-TPC) going into operation in an underground laboratory. In the development of the electronics, a particular effort has been addressed to study and implement an on-line hit finding algorithm, for the definition of regions of interest (ROI). This feature has shown to be sensitive to small charge depositions (~1 MeV)...Go to contribution page
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Mr Igor Konorov (Technische Universitat Munchen)23/09/2010, 10:15The COMPASS digital trigger system is an FPGA based real time trigger logic which detects event signature by analyzing already digitized detector information. The trigger system has distributed multi stage architecture. The first stage is implemented in front-end electronics and it runs in parallel to data acquisition. The COMPASS event selection criteria are based on event geometry, extracted...Go to contribution page
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Mr Jens Dopke (University of Wuppertal)23/09/2010, 10:15With higher instantaneous luminosity, the present Pixel detector system will run into readout inefficiencies. To compensate for those and yet provide good impact parameter resolution with an upgraded LHC, a Layer designed for reading out higher occupancies is to be inserted into Pixel during the Phase1 Upgrade of ATLAS. This additional layer, called IBL (Insertable B-Layer), will include newly...Go to contribution page
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Steffen Staerz (Inst. fuer Kern- und Teilchenphysik (IKTP)-Technische Universita)23/09/2010, 11:00A new readout driver (ROD) is being developed as a central part of the signal processing of the ATLAS liquid-argon calorimeters for operation at the sLHC. In the architecture of the upgraded readout system, the ROD modules will have several challenging tasks: receiving of up to 1.4 Tb/s of data per board from the detector front-end on multiple high-speed serial links, low-latency data...Go to contribution page
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Mr Olivier Bourrion (Laboratoire de Physique Subatomique et de Cosmologie (LPSC)-Univ)23/09/2010, 11:00The electromagnetic calorimeter (EMCAL) of ALICE is a large acceptance calorimeter that will enhance the capabilities for jet measurement. Based on the previous development made for the Photon Spectrometer (PHOS) level-0 trigger, a specific electronic upgrade was designed in order to allow a fast triggering on high energy jets (level-1). This development was made possible by the use of the...Go to contribution page
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Steffen Lothar Muschter (Stockholm University)23/09/2010, 11:25The GigaBit Transceiver (GBT) has been developed to provide data transmission and to replace the Timing , Trigger and Control (TTC) system between on-detector and off-detector components in future sLHC detectors. A VHDL version of the GBT-SERDES, designed for FPGAs, has been released in March 2010 as a GBT-FPGA Starter Kit for future GBT users and for off-detector GBT implementation. This code...Go to contribution page
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Juraj Bracinik (University of Birmingham, UK)23/09/2010, 11:25The ATLAS first-level calorimeter trigger is a hardware-based system designed to identify high-pT jets, electron/photon and tau candidates and to measure total and missing ET in the ATLAS calorimeters. After more than two years of commissioning in situ with calibration data and cosmic rays, the system has now been extensively used to select the most interesting proton-proton collision events....Go to contribution page
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Nick Ryder (Unknown-Unknown-Unknown)23/09/2010, 11:50The Versatile Link project is a joint effort between CERN and several experiments to develop a high-speed optical link for use in the LHC upgrades. Of concern to the project is the fact that optical fibres experience higher levels of attenuation at low temperatures for the same integrated dose. This paper describes a CO2 cooling system which was used in a radiation environment for exposures of...Go to contribution page
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Dr Yuri Ermoline (MSU)23/09/2010, 11:50The ATLAS Level-1 Calorimeter Trigger (L1Calo) is a fixed latency, hardware-based pipelined system designed for operation at the LHC design luminosity of 10^34cm-2s-1. Plans for a several-fold luminosity upgrade will necessitate a complete replacement for L1Calo (Phase II). But backgrounds at or near design luminosity may also require incremental upgrades to the current L1Calo system (Phase...Go to contribution page
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Mr Sergio Diez Cornell (Instituto de Microelectronica de Barcelona - Centro Nacional de Microelectronica IMB-CNM (CSIC))23/09/2010, 12:15This work presents radiation hardness studies performed on LDMOS devices of SGB25VGOD technology from IHP Microelectronics. These devices would constitute the power switches of the buck converters on the DC-to-DC powering scheme for the ATLAS Upgrade silicon tracker. Devices were irradiated with neutrons up to the target fluences expected inside ATLAS Upgrade. They exhibited very good...Go to contribution page
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Robert Richter (Max-Planck-Institut fur Physik)23/09/2010, 12:15The upgrade of the LHC towards luminosity beyond the design value requires improved L1 trigger selectivity in order to keep the maximum total trigger rate at 100 kHz. In the ATLAS L1 muon trigger system this necessitates an increase of the pT threshold for single muons. Due to the limited spatial resolution of the trigger chambers, however, the selectivity for tracks above ~20 GeV/c is...Go to contribution page
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Jinlong Zhang (Argonne National Laboratory (ANL))23/09/2010, 12:40The existing three-level ATLAS trigger system is deployed to reduce the event rate from the bunch crossing rate of 40 MHz to ~200 Hz for permanent storage at the LHC design luminosity of 10^34 cm^-2 s^-1. When the LHC reaches beyond the design luminosity, the load on the Level-2 trigger system will significantly increase due to both the need for more sophisticated algorithms to suppress...Go to contribution page
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Vincent Spellane23/09/2010, 14:15Parts Obsolescence, Diminishing Manufacturing Sources and Material Shortages (DMSMS), and End of Life (EOL) are used interchangeably to describe a variety of sustainability problems. They range from being unable to purchase or procure parts, components, or subcomponents, to being unable to sustain major, complex systems due to a lack of component availability or may result in excessive cost. ...Go to contribution page
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Philippe Farthouat (CERN)23/09/2010, 15:00
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Prof. K.K. Gan (The Ohio State University)23/09/2010, 15:10
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Kostas Kloukinas (CERN)23/09/2010, 15:20
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Magnus Hansen (CERN)23/09/2010, 15:30
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Dr Eisse Mensink (Bruco Integrated Circuits B.V.)23/09/2010, 16:00Pixel chips generate a large amount of data. In the foreseen application, the data has to be transported off chip via a micro twisted-pair cable. Because of the low bandwidth of the cable, equalization is needed. Pulse-width modulation turns out to be the best equalization method at the transmitter side. However, at 10Gb/s the eye-opening at the receiver side is very sensitive to the exact...Go to contribution page
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Tiankuan Liu (Department of Physics-Southern Methodist University (SMU))23/09/2010, 16:00An LC phase locked loop ASIC, fabricated in a commercial 0.25-µm Silicon-on-Sapphire CMOS technology, has been characterized in lab. Random jitter and deterministic jitter are less than 2.5 ps and 10 ps, respectively. The power consumption at 4.9 GHz is 218 mW. The measured tuning range, from 4.7 to 5.0 GHz, is narrower than the simulated values of from 3.8 to 5.0 GHz. The narrow tuning range...Go to contribution page
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Mr Sander Heuvelmans (Bruco Integrated Circuits B.V.)23/09/2010, 16:00Increasing luminosity in high energy physics experiments leads to new challenges in the design of data acquisition systems for pixel detectors. With the upgrade of the LHCb experiment, the data processing will also be changed; all hit data will be transported off the pixel chip, without any trigger selection. A read-out architecture is proposed which is able to obtain low hit data loss on...Go to contribution page
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Mr Patrick Pangaud (Centre de Physique des Particules de Marseille (CPPM))23/09/2010, 16:00Hybrid pixels detectors featuring high spatial resolution, very good signal to noise ratio and radiation hardness are currently used in vertex detectors for High Energy Physic experiments. As technology shrinking reaches some limitations, a way to face challenges of ATLAS/SLHC future hybrid pixel vertex detectors is to use the emerging 3-D technologies. This talk presents the design and test...Go to contribution page
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Mr Daniel Paer Erik Eriksson (Department of Physics-Stockholm University)23/09/2010, 16:00The ATLAS TileCalorimeter contains some 2000 digitizer boards with 2 TileDMU ASICs on each board. Although we have the agreed number of spares this paper discusses a backup version of the digitizer to be used in case more units are required. The TileDMU has been replaced with a cheap and readily available FPGA (Spartan 6) and we have replaced some components to protect against obsolescence....Go to contribution page
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Mr Alan Prosser (Fermilab)23/09/2010, 16:00A collaboration between Fermilab and the Institute for High Energy Physics (IHEP), Beijing has developed a test beam telescope for the IHEP test beam facility. This telescope is based on 5 stations of silicon strips detectors with a pitch of 60 microns. The total active area of the detector is about 12cm x 10cm. Readout of the strips is provided through the use of VA1' ASICs mounted on custom...Go to contribution page
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Matteo Beretta (Istituto Nazionale Fisica Nucleare (INFN) - Laboratori Nazionali di Frascati)23/09/2010, 16:00We describe a VLSI processor for pattern recognition based on Content Addressable Memory (CAM) architecture, optimized for on-line track finding in high-energy physics experiments. A large CAM bank stores all trajectories of interest and extracts the ones compatible with a given event. This task is naturally parallelized by a CAM architecture able to output identified trajectories, recognized...Go to contribution page
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Dr Alessandro Gabrielli (Dipartimento di Fisica)23/09/2010, 16:00An additional inner layer for the existing ATLAS pixel detector, called insertable B-layer (IBL), is under design and it will be installed by LHC-PHASE1. New front-end readout ASICs have already been fabricated and will replace the previous chips in this layer. The new system features higher readout speed - 160Mbit/s per ASIC - and simplified control. The current data acquisition chains are...Go to contribution page
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Dr Petra Haefner (MPI Munich)23/09/2010, 16:00PosterThe SemiConductor Tracker (SCT), made up from silicon micro-strip detectors is the key precision tracking device in ATLAS, one of the experiments at CERN LHC. The completed SCT is in very good shape: 99.3% of the SCT strips are operational, noise occupancy and hit efficiency exceed the design specifications. In the talk the current status of the SCT will be reviewed. We will report on the...Go to contribution page
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43. Charge Sensitive Amplifier (CSA) in cold gas of Liquid Argon (LAr) Time Projection Chamber (TPC)Herve Mathez (Institut de Physique Nucleaire de Lyon (IPNL)-Universite Claude)23/09/2010, 16:00The common channel of this 8-channel chip is made of a Low noise Charge Sensitive Amplifier (CSA) with respectively 250fF and 4MΩ feedback capacitance and resistance. The CSA is followed by a bandpass filter centred at 1µs and a buffer line driver. An ‘i2c-like’ protocol serial link allows slow control of registers, giving multiple configuration features to the circuit. The input referred...Go to contribution page
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Beat Meier (PSI)23/09/2010, 16:00The CMS pixel detector is planned to be upgraded in 2015 to a new one with a significantly reduced material budget. The new pixel system with more layers has to operate through the existing services at double the luminosity. Therefore a new readout scheme is implemented in the new pixel read out chip (ROC). A detailed description of the ASIC modifications of the digital readout interface of...Go to contribution page
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Jennifer Merz (RWTH Aachen University)23/09/2010, 16:00For a new CMS tracker at SLHC cooling of the silicon sensors and their electronics is a crucial issue. An evaporative CO2 system is currently under investigation, which could provide more cooling power at a lower mass than the current mono-phase liquid system. Additionally CO2 could allow lower operating temperatures, which is beneficial for the sensor performance and lifetime. The...Go to contribution page
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Ms Kathrin Becker (Bergische Universitaet Wuppertal, Germany)23/09/2010, 16:00Upgrades of the LHC and the ATLAS experiment will include a new pixel detector. To operate a future pixel detector a completely new detector control system (DCS) is needed, that is embedded in the pixel electronic systems. Next to high reliabilty the requirements for the detector control system are low mass, less usage of material and cable and radiation hardness to always guarantee a save...Go to contribution page
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97. Design and characterization of an SEU-robust register in 130nm CMOS for application in HEP ASICsDr Sandro Bonacini (CERN)23/09/2010, 16:00A new SEU-robust D-flip-flop register structure was designed in 130 nm CMOS for utilization in a rad-tolerant library. The register was tested in a heavy ion beam facility and showed a cross section lower than 1e-10 cm²/bit in the LET range (1.2 – 62.0 MeVcm²/mg) representing an improvement of 1000 times over previously studied standard library cells. No errors were observed at LETs under 30 MeVcm²/mg.Go to contribution page
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Francesco Fiori (INFN Sezione di Pisa (INFN))23/09/2010, 16:00Experience at high luminosity hadrons collider experiments shows that tracking information enhances the trigger rejection capabilities while retaining high efficiency for interesting physics events. The design of a tracking based trigger for Super LHC (S-LHC), the already envisaged high luminosity upgrade of the LHC collider, is an extremely challenging task, and requires the identification...Go to contribution page
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annie xiang (Southern Methodist University)23/09/2010, 16:00This paper presents a Bit Error Rate (BER) Tester implemented in an Altera Stratix II GX signal integrity development kit. Architecture of the tester is described. Experimental and simulation results are discussed. A parallel to serial PRBS generator and a bit/link status error detector are deployed to characterize serial data link performance. The auto-correlation pattern enables receiver...Go to contribution page
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Jia WANG (Institut Pluridisciplinaire Hubert CURIEN,France; Northwestern Polytechnical University, China)23/09/2010, 16:00This paper presents an on-chip low dropout (LDO) regulator which provides the clamping voltage in monolithic active pixel sensors (MAPS) for STAR experiment. By utilizing a buffer and a serial RC network, the regulator can achieve good stability, low power and low noise. Its output voltage is programmable by using a digital-controlled resistor. The proposed LDO regulator has been implemented...Go to contribution page
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Osamu Sasaki (High Energy Accelerator Research Organization (KEK))23/09/2010, 16:00The present muon Level-1 trigger of the ATLAS is given by dedicated detectors for the trigger; RPC and TGC chambers in barrel and endcap regions, respectively. The monitored drift tube (MDT) chambers and the CSC are used for precision measurements of muon tracks. The performance of the muon Level-1 trigger is limited by the momentum resolution of the trigger chambers. In order to improve the...Go to contribution page
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Mr Takashi Hayakawa (Department of Physics-Kobe University-Unknown)23/09/2010, 16:00PosterIn 2009 the first beam collision was occurred at LHC and the ATLAS detector has started data taking with beam collision at 7TeV since May 2010. Thanks to the eagerest commissioning works with test pulses, cosmic rays and single beams, the Level-1 endcap muon trigger system can successfully provide trigger signals on proper timing for the ATLAS detector. The phase adjustment of the gate...Go to contribution page
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Mr Tim Martin (University of Birmingham, UK)23/09/2010, 16:00The design of minimum bias triggers should allow for a highly efficient selection on pp-collisions, while minimising any possible bias in the event selection. In ATLAS two main minimum bias triggers have been developed using complementary technologies. A hardware based first level trigger, consisting of 32 plastic scintillators, has proven to efficienctly select pp-interactions. In particular...Go to contribution page
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Ricardo Marco Hernandez (Instituto de Fisica Corpuscular (IFIC)-Universitat de Valencia-U)23/09/2010, 16:00A telescope for a beam test have been developed and it is described. This system is intended to carry out both analogue charge collection and spatial resolution measurements with different types of microstrip or pixel silicon detectors in a beam test environment. The telescope has four XY measurement as well as trigger planes (XYT board) and it can accommodate up to twelve devices under test...Go to contribution page
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Mr Sebastian Manz (Heidelberg University)23/09/2010, 16:00Since 2007 we design and develop a ROC (read-out controller) for FAIR's data-acquisition. While our first implementation solely focused on the nXYTER, today we are also designing and implementing readout logic for the GET4 which is supposed to be part of the ToF detector and the CBM-XYTER which is supposed to be used in various other detectors like the STS or the TRD detectors. Furthermore we...Go to contribution page
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Tullio Grassi (FNAL / Univ. of MD)23/09/2010, 16:00We present an upgrade plan for the CMS HCAL front-end electronics. The HCAL upgrade is required for the increased luminosity of SLHC Phase I which is targeted for 2015. A key aspect of the HCAL upgrade is to add detector segmentation. The increased segmentation is achieved by replacing the hybrid photodiodes (HPDs) with silicon PMTs (SiPMs). We plan to instrument each fiber of the calorimeter...Go to contribution page
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Dr Gisèle MARTIN-CHASSARD (Laboratoire de l Accélérateur Linéaire)23/09/2010, 16:00PARISROC is the front-end ASIC designed to read 16 photomultiplier (PM) tubes for neutrino experiments. It’s able to shape, discriminate, convert and readout data in an autonomous and channel-independent mode. The tests made on PARISROC1 have shown some limitations on time measurements and on hit rate capability. In order to correct these points, the digital part of PARISROC2 has been...Go to contribution page
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Mr Christian Irmler (HEPHY Vienna)23/09/2010, 16:00A major upgrade of the KEK-B factory (Tsukuba, Japan), aiming a peak luminosity of 8 x 10^35 / (cm^2s), which is 40 times the present value, is foreseen until 2013. Consequently an upgrade of the Belle detector and in particular its Silicon Vertex Detector (SVD) is required. We will introduce the concept and prototypes of the full readout chain of the Belle II SVD. Its APV25 based front-end...Go to contribution page
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Dr Paul Rubinov (Fermilab)23/09/2010, 16:00This report describes a system designed to simplify the use of SiPM in small scale projects, with 1 to 100 SiPMs. The system consists of 4ch digitizer boards (called TB4), and Windows software. Each TB4 contains 4 channels of electronics with gain appropriate for use with SiPMs, and four 14bit, 250MSPS digitizers. Each TB4 also has a Cockroft Walton voltage multiplier to generate the necessary...Go to contribution page
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Mr Jonathan Emery (CERN)23/09/2010, 16:00The reliability concerns have driven the design of the LHC BLM system from the early stage of the studies up to the present commissioning and the latest development of diagnostic tools. To protect the system against non-conformities, new ways of automatic checking have been developed and implemented. These checks are regularly and systematically executed by the LHC operation team to insure...Go to contribution page
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Mr Benjamin Lemouzy (Conseil Europeen Recherche Nucl. (CERN))23/09/2010, 16:00The goal of the LHCb readout upgrade is to speed up the DAQ to 40 MHz. Such a DAQ system will certainly employ 10 Gigabit or similar technologies and might also need new networking protocols such as a customized, light-weight TCP or more specialised protocols. A test module is being implemented, which integrates in the existing LHCb infrastructure. It is a multiple 10-Gigabit traffic...Go to contribution page
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Mr Robert Schnell (HISKP, University Bonn)23/09/2010, 16:00PosterThis work presents an FPGA-based readout system for double-sided silicon strip sensors based on the APV25 Frontend-Chip. The system consists of an ADC-card and a digital readout board containing an FPGA. Data extraction algorithms implemented in the FPGA allow baseline and pedestal correction, hit detection and event-building. These algorithms provide an efficient data reduction tool and high...Go to contribution page
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Mr Alan Prosser (Fermilab)23/09/2010, 16:00Particle physics detectors utilize readout data links requiring a complicated network of copper wires or optical fibers. These links are both massive and costly. Upgrades to such detectors may require additional bandwidth to be provisioned with limited space available to route new cables or fibers. In contrast, free-space optical interconnects will offer cableless readout, thereby resulting in...Go to contribution page
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Mr Andrej Seljak (Jožef Stefan institute, Ljubljana Slovenia)23/09/2010, 16:00For the upgrade of the Belle detector (Belle-II) at the KEK collider, we are developing a proximity focusing ring imaging Cherenkov detector using aerogel as radiator, which will allow efficient separation of kaons from pions in the wide range of particle momenta up to 4Gev/c. One of the photon detector candidates (which has to operate in a strong magnetic field of 1.5T) is a HAPD of proximity...Go to contribution page
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Dr Fernando Arteche (Instituto Tecnologico de Aragon)23/09/2010, 16:00The characterization of the noise emissions of DC-DC converters and their impact at the system level is critical to optimize the design of the detector and define rules for the integration strategy. This paper presents the effects of the circuitry impedance of the tracker power distribution network on the noise emissions of DC-DC converters. It allows to quantify the real noise emitted by the...Go to contribution page
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Dr Andrea Salamon (INFN Sezione di Roma Tor Vergata)23/09/2010, 16:00We present test results and characterization of a data transmission system based on a last generation FPGA and a commercial QSFP+ module. QSFP+ standard defines a hot-pluggable transceiver available in copper or optical cable assemblies for an aggregated bandwidth of up to 40 Gbps. We implemented a complete testbench based on a commercial development card mounting an Altera Stratix IV FPGA...Go to contribution page
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Yoshinobu Unno (KEK)23/09/2010, 16:00A low voltage power supply was developed with a step-down piezoelectric transformer (PT), capable of supplying up to 4 A at an output voltage of 2 V, where the efficiency was estimated to be better than 80 %. The PT was 15 by 15 by 5 mm in size and composed of two layers at the primary and of 40 layers at the secondary. A new PT is manufactured with an improved process to have a reduced...Go to contribution page
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Dr Daniel Tapia Takaki (University of Birmingham / at CERN)23/09/2010, 16:00In the ALICE experiment, the Low-Voltage Differential Signalling (LVDS) format is used for the transmission of trigger inputs from the detectors to the Central Trigger Processor (CTP), the L0 trigger outputs from Local Trigger Units (LTU) boards back to the detectors and the BUSY inputs from the sub-detectors to the CTP. ALICE has designed a developed set-up, called the LVDS transmission...Go to contribution page
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Ms Sylvie BLIN (LAL Orsay - IN2P3)23/09/2010, 16:00The MAROC ASICs family is dedicated to the readout of 64-channel Multi Anode PMT and similar detectors. Its main roles are to correct the gain spread of MAPMT channels thanks to an individual variable gain preamplifier and to discriminate the input signals (from 50fC i.e 1/3 photo-electron) in order to produce 64 trigger outputs. A multiplexed analog charge output is also available with a...Go to contribution page
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Dr Tobias Flick (Bergische Universitaet Wuppertal)23/09/2010, 16:00Future high energy physics experiments will operate at energies much higher than the present ones. To read out even the innermost detectors electronics and optical components must be developed to survive the harsh conditions during the lifetime of the experiments. It has been found that for VCSEL the irradiation hardness is connected to the temperature behavior of the device and that an...Go to contribution page
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Thomas Würschig (HISKP, Uni Bonn)23/09/2010, 16:00The Micro-Vertex-Detector is the innermost detector of the PANDA experiment using silicon pixel detectors in the inner and double-sided microstrip detectors in the outer parts. The ongoing hardware development, the implementation of the cooling system and the detector integration will be highlighted. This includes a summary of measurements with test systems, the machining of support...Go to contribution page
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Gisèle Martin-Chassard (OMEGA, Laboratoire de l'Accélérateur Linéaire, LAL, Université Paris-Sud, CNRS/IN2P3)23/09/2010, 16:00MICRO MEsh GAseous Structure (MICROMEGAS) and Gas Electron Multipliers (GEM) detectors are two candidates for the active part of a Digital Hadronic CALorimeter (DHCAL) as part of a high energy physics experiment at the International Linear Collider. Physics requirements lead to a highly granular hadronic calorimeter with up to thirty million channels with probably only hit information (digital...Go to contribution page
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Mr Pavel Stejskal (CERN)23/09/2010, 16:00Optical link components will typically be exposed to intense radiation fields during operation in the SLHC inner detectors and their qualification in terms of radiation tolerance is thus required. We have created a model that describes a semiconductor laser undergoing irradiation to enable the extrapolation to full lifetime total fluences from lower fluence radiation tests. This model uses a...Go to contribution page
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Mr Spyridon Georgakakis (CERN)23/09/2010, 16:00High Level Synthesis takes an abstract behavioural or algorithmic description of a digital system and creates a register transfer level structure that realises the described behaviour. Various methodologies have been developed to perform such synthesis tasks. Much research has lead to the development of electronic design automation tools capable of HLS that are now being accepted by industry....Go to contribution page
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Mr Alan Prosser (Fermilab)23/09/2010, 16:00This paper describes the assessment of commercially available and prototype parallel optics modules for possible use as back end components for the Versatile Link common project. The assessment covers SNAP12 transmitter and receiver modules as well as optical engine technologies in dense packaging options. Tests were performed using vendor evaluation boards (SNAP12) as well as custom...Go to contribution page
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Mr Sergio Silva (INESC Porto, Faculdade de Engenharia, Universidade do Porto)23/09/2010, 16:00In an optical transceiver, the power consumption related to the operation of the laser device takes a significant parcel of the total consumed power. The reduction of it is an important issue when a large number of transceiver devices are interconnected in an optical network, such as the one that supports the data transmission in particle physics experiments. An analysis and simulation results...Go to contribution page
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Mr Brad Weber (Max Planck Institute For Physics - Munich)23/09/2010, 16:00We present the performance of a newly developed analogue chip for readout of the ATLAS muon drift-tube (MDT) chambers, using the IBM 130 nm CMOS 8RF-DM technology. The 4-channel Amplifier-Shaper-Discriminator (ASD) chip of 2.1 * 2.1 mm2 size was designed to match the analogue performance of the presently used device in 0.5 um Agilent technology, which is now obsolete. The aim of this first...Go to contribution page
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Mr Ringo Schmidt (Deutsches Elektronen-Synchrotron (DESY))23/09/2010, 16:00PosterThe Beam Conditions and Radiation Monitoring System, BRM, is implemented in CMS to protect the detector and provide an interface to the LHC. Seven sub-systems monitor beam conditions and the radiation level on different time scales. They detect adverse beam conditions, facilitate beam tuning close to CMS, and measure the doses accumulated in different detector components. Data are taken and...Go to contribution page
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Mr Eric Wanlin (Institut de physique nucleaire d’Orsay – CNRS-IN2P3/Universite Paris 11)23/09/2010, 16:00The next generation of proton decay and neutrino experiments, the post-SuperKamiokande detectors as those that will take place in megaton size water tanks, will require very large surfaces of photodetection and a large volume of data. Even with large hemispherical photomultiplier tubes (PMT), the expected number of channels should reach hundreds of thousands. An french ANR funded R&D program...Go to contribution page
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Mr G. Spiazzi (Universita di Padova, Italy)23/09/2010, 16:00This paper investigates the use of switching converters for the power supply distribution network in the ATLAS experiment when the Large Hadron Collider (LHC) will be upgraded beyond the nominal luminosity. Due to the highly hostile environment the converters must operate in, all the main aspects are considered in the investigation, from the selection of the switching converter topologies to...Go to contribution page
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Mr Chonghan Liu (Southern Methodist University)23/09/2010, 16:00A number of critical active and passive components of optical links are successfully tested at 77 K or lower, demonstrating a potential to develop optical links operating inside the Liquid Argon Time Projection Chamber (LArTPC) detector cryostat. Ring oscillators, individual MOSFETs, and a 16:1 5-Gbs serializer fabricated in a commercial 0.25-um Silicon-on-Sapphire (SoS) CMOS technology...Go to contribution page
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Yoichi Ikegami (KEK)23/09/2010, 16:00The main goal of this R&D program is to prove to the community that a modular silicon strip tracker concept is a reasonable design that can satisfy the required material, mechanical, electrical and thermal performance specifications throughout the SLHC period. The R&D program places considerable emphasis on design aspects that minimize the development and construction effort and cost, while...Go to contribution page
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Mr Jan Sammet (RWTH Aachen University)23/09/2010, 16:00A new powering scheme is considered to be mandatory for the CMS tracker at SLHC. The baseline solution of CMS foresees the use of DC-DC converters, allowing to provide larger currents while reducing losses. An important component of most converters are inductors, which, however, tend to radiate the switching noise generated by the converter. The radiated emissions of several converters have...Go to contribution page
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Mr Alan Prosser (Fermilab)23/09/2010, 16:00The upgrades of the Large Hadron Collider (LHC) introduce a significant challenge to the power distribution of the detectors. DC-DC conversion is the preferred powering scheme proposed to be integrated for the CMS tracker to deliver high input voltage levels and performing a step-down conversion nearby the detector modules. In this work, we investigate the integrity of power distribution and...Go to contribution page
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Michael King (Vanderbilt University)23/09/2010, 16:00The radiation response of a commercial 0.25 μm silicon-on-sapphire CMOS technology was characterized at the transistor and circuit levels utilizing standard or enclosed layout devices. Device-level characterization showed ΔVT of less than 170 mV and ΔILEAKAGE of less than 1 nA for nMOSFET and pMOSFET devices at a total dose of 100 krad(SiO2). The increase in power supply current at the circuit...Go to contribution page
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Mr Salleh Ahmad (LAL,Orsay - IN2P3)23/09/2010, 16:00SPACIROC is designed for the JEM-EUSO observatory onboard of the International Space Station (ISS). This 64 channels readout ASIC offers photon counting capability and includes a charge to time (Q-to-T) converter. The main requirement for the photon counting is to obtain a 100% trigger efficiency starting from 1/3 p.e. with a 10 ns double pulse resolution. As for the Q-to-T converter, the chip...Go to contribution page
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Dr Timo Tick (CERN – PH department, 1211 Geneva 23 Switzerland, On behalf of all the members of the Medipix HPD team)23/09/2010, 16:00This paper describes the design of a high-speed, single-photon counting, hybrid photon detector. The detector consists of a vacuum tube, containing a micro channel plate and 4 CMOS pixel read out chips, sealed with a transparent optical input window with a photocathode. The described design utilizes currently available technologies, specifically the Timepix read out chips, and the Photonis...Go to contribution page
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Mr Pablo Fernandez Carmona (CERN)23/09/2010, 16:00To reach a sufficient luminosity, the transverse beam sizes and emittances in future linear particle accelerators should be reduced to the nanometer level. Mechanical stabilization of the quadrupole magnets is of the utmost importance for this. The piezo actuators used for this purpose can also be used to make fast incremental orientation adjustments with a nanometer resolution. The main...Go to contribution page
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Mr Sebastien Drouet (Institut de physique nucleaire d’Orsay – CNRS-IN2P3/Universite Paris 11)23/09/2010, 16:00PARISROC_V2 is a complete read out chip, in AMS SiGe 0.35µm technology, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and its belongs to an R&D program funded by the French national agency for research (ANR) called PMm²: “Innovative Electronics for photodetectors array used in High Energy Physics and Astroparticles”. The ASIC integrates...Go to contribution page
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Michel Morel (CERN)23/09/2010, 16:00The NA62 Giga Tracker is a low mass time tagging hybrid pixel detector operating in a particle rate of 800 MHz. It consists of three stations with a sensor size of 60 x 27 mm^2 containing 18000 pixels of the size 300 x 300 µm^2 each. The active area is connected to a matrix of 2 x 5 pixel ASICs, which time tags the arrival of the particles with a binning of 100 ps. The detector operates in...Go to contribution page
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Sophie Baron (CERN)23/09/2010, 16:00The Gigabit Link Interface Board (GLIB) is an evaluation platform and an easy entry point for users of high speed optical links in high energy physics experiments. Its intended use ranges from optical link evaluation in the laboratory, to control triggering and data acquisition from remote modules in beam or irradiation tests. The GLIB is a double width Advanced Mezzanine Card (AMC)...Go to contribution page
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Markus Friedl (HEPHY Vienna)23/09/2010, 16:00The pixel detector of the CMS experiment at the LHC is read out by analog optical links, sending the data to 9U VME Front-End Driver (FED) boards located in the electronics cavern. There are plans for the phase 1 upgrade of the pixel detector (~2015) to add one more layer, while significantly cutting down the overall material budget. At the same time, the optical data transmission will be...Go to contribution page
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Dr Saverio Minutoli (INFN - Genova)23/09/2010, 16:00The TOTEM Read-Out Card (ROC) is the main component of the T1 forward telescope front-end electronic system. It is mounted in the “Local Detector region” of the T1 detector structure between the “On Detector Region” represented by the front-end hybrids and the “Counting Room”. The ROC main objectives are to acquire tracking data and trigger information from the T1 Cathode Strip Chamber (CSC)...Go to contribution page
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Mr Mikhail Matveev (Rice University)23/09/2010, 16:00The present Muon Port Card (MPC) provides sorting of incoming Level 1 Trigger primitives and optical transmission of three best ones to the Track Finder within the Cathode Strip Chamber CSC)sub-detector at the CMS experiment at CERN. The transmission system comprises 180 1.6Gbps links; it has been in operation since 2008. The proposed Super-LHC upgrade implies higher data volume to be...Go to contribution page
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Andrei Khomich (Kirchhoff-Institut fuer Physik, Heidelberg University)23/09/2010, 16:00The ATLAS Level-1 Calorimeter Trigger is a hardware-based pipelined system designed to identify high-pT objects in the ATLAS calorimeters within a fixed latency of 2.5us. It consists of three subsystems: the PreProcessor which conditions and digitizes analogue signals and two digital processors. The majority of the PreProcessor's tasks are performed on a dense Multi-Chip Module(MCM)consisting...Go to contribution page
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Mr Markus Fras (Max-Planck-Institut fuer Physik)23/09/2010, 16:00The Triple Modular Redundancy (TMR) technology allows protection of the functionality of FPGAs against single event upsets (SEUs). Each logic block is implemented three times with a 2-out-of-3 voter at the output. Thus, the correct logical value is available even if there is an upset bit in one location. We applied TMR to the configuration code of a Virtex-II-2000 FPGA, which serves as the...Go to contribution page
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Dr Gianluca Aglieri Rinella (CERN)24/09/2010, 09:00ALICE (A Large Ion Collider Experiment) is a general purpose heavy-ion detector at the CERN LHC, addressing the physics of strongly interacting matter and the quark-gluon plasma in nucleus-nucleus collisions. ALICE has been recording physics data since the first proton-proton collisions at LHC as reference for the heavy-ion programme and to address physics topics for which it is complementary...Go to contribution page
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Thilo Pauly (CERN)24/09/2010, 09:20Since spring 2010 the LHC delivers proton-proton collisions at 3.5 TeV marking the start of its high-energy physics program. In this presentation we give an overview of the ATLAS detector during this period, with emphasis on the performance of the sub-detectors and their electronics. We cover operational aspects necessary for smooth, safe, and stable data taking, as well as discuss resolved...Go to contribution page
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Prof. Anders Ryd (Cornell University)24/09/2010, 09:40The performance of the CMS detector during the first operation with beam from the LHC is reviewed. The talk will discuss the overall performance of the CMS detector with some emphasis on operational aspects related to electronicsGo to contribution page
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Karol Hennessy (Department of Physics-Oliver Lodge Laboratory-University of Live)24/09/2010, 10:00The LHC 7TeV Physics programme started at the end of March 2010. This talk highlights the experiences of running the LHCb detector with early pp-collisions from the LHC. An overview of the operation of the detector with the first 100nb^-1 will be given, and the challenge of running the detector smoothly in the initial data taking stages. Focus will be given to the performance of the hardware...Go to contribution page
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Mark Stockton (CERN)24/09/2010, 10:45The ATLAS Level-1 trigger system is responsible for reducing the anticipated LHC collision rate from 40 MHz to less than 100 kHz. This Level-1 selection identifies jets, electrons/photons and muons, with additional triggers for missing and total energy. These inputs are used by the Level-1 Central Trigger to form a Level-1 Accept decision. This decision, along with clock and summary...Go to contribution page
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Dr Jonathan Z Efron (University of Wisconsin)24/09/2010, 11:10We report on the first operations of the CMS Regional Calorimeter Trigger (RCT) with collisions. Many first physics analyses at CMS have used calorimeter triggers. The RCT receives 8 bit energies and a data quality bit from the HCAL and ECAL Trigger Primitive Generators (TPGs) and sends it to the Global Calorimeter Trigger (GCT) after processing. The RCT hardware consists of 1 clock...Go to contribution page
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Mr Dominick Olivito (University of Pennsylvania)24/09/2010, 11:35The ATLAS Transition Radiation Tracker (TRT) is the outermost of the three sub-systems of the ATLAS Inner Detector containing close to 350,000 thin-wall drift tubes (straws) operated with a Xenon-based gas mixture. The characteristics of the TRT data acquisition are exemplified by the front end electronics. These consist of separate analog and digital ASICS, the ASDBLR and DTMROC. The...Go to contribution page
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Mr Federico Alessio (CERN)24/09/2010, 12:00The acquisition board is used as a readout board for the LHCb beam pickups in order to continuously monitor the bunch intensities and the phase of the bunches of protons with respect to the LHC bunch clock, and as a high-speed and high-sensitivity readout system for a scintillator background monitor which records fast beam losses with time information. In this paper we will describe its...Go to contribution page
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24/09/2010, 12:25
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