Ozgur Cobanoglu
(Univ. + INFN)
27/09/2006, 16:20
Poster
In this paper we present an 8 channel full-custom ASIC prototype, named "CMAD",
designed for the readout of the RICH-I detector system of the COMPASS experiment at
CERN.
The task of the chip is amplifying the signals coming from fast multi-anode
photomultipliers and comparing them against a threshold adjustable on-chip on a
channel by channel basis.
CMAD was developed using a...
Georgios Sidiropoulos
(University of Ioannina)
27/09/2006, 16:20
Poster
A programmable random trigger emulation system has
been built for use in high
energy physics, nuclear physics or radiology
experiments. The emulator is based on
the generation of trigger time intervals using a true
random bit generator. The
system is able to work either as a stand alone trigger
emulator or as a plug-in
module for a trigger/readout system.
Emmanuel Vaumorin
(PROSILOG),
Thierry Romanteau
(LLR Polytechnique)
27/09/2006, 16:20
Poster
The ECAL sub detector of the CMS experiment is composed of one barrel and two
endcaps. The crystals of the endcaps are arranged on an X-Y grid. Mapping signal
clusters on to the eta-phi coordinate system required for the trigger therefore
presents a problem. The 48 channels Trigger Concentrator Card (TCC48) is designed to
compute the trigger primitives of the different parts of each...
Guilherme Cardoso
(Fermi National Accelerator Laboratory)
27/09/2006, 16:20
Poster
The Front-End R&D group at Fermilab has been developing pixel hybridized modules and
silicon strip detectors for the past decade for high-energy physics experiments. To
accomplish this goal, one of the activities the group has been working on includes
the development of a high-speed and high-bandwidth data acquisition and test system
to characterize front-end electronics. In this paper,...
Tobias Flick
(Bergische Universitaet Wuppertal)
27/09/2006, 16:20
Poster
The ATLAS detector is one of the LHC experiments going to start data taking in 2007.
The innermost subdetector of ATLAS will be a pixel detector. It consists of 1744
pixel modules which are controlled and read out via optical signals. The off detector
end of the optical link is the Back of Crate card which is performing the
optical-electrical conversion and adopting the timing for the...
Andres Russu
(Astronomy and Space Science Group - ICMUV - University of Valencia)
27/09/2006, 16:20
Poster
The aim of this paper is to present the preliminary background modelling results of
the Miniature X-and Gamma-ray Sensor (MXGS) instrument in the Atmospheric-Space
Interaction Monitor (ASIM). ASIM is an atmosphere event observatory with a wide
energy range (from optical to gamma-ray) foreseen to be located at the external
facility of the Columbus Module at the ISS in 2009.
The model...
Alexander Singovski
(University of Minnesota & CERN)
27/09/2006, 16:20
Poster
The final design of the low voltage power system of the CMS ECAL detector will be presented.
The particular requirements of the ECAL on-detector electronics powering will be discussed
and details of the W-IE-NE-R MARATON system design related to these features will be pointed out.
All tests performed with the ECAL-specific version of the MARATON power supply units will be
summarized. The...
Alexander Singovski
(University of Minnesota & CERN)
27/09/2006, 16:20
Poster
CMS ECAL detector will require more than 400 dense multi-ribbon optical cables, made of
single mode 9 micron quartz fibers, for the data, control and trigger data transfer between
on-detector and off-detector electronics.
Although all cables will be tested before installation, one cannot guarantee no single fiber
damage during the mass cable pooling campaign at the underground area....
Robert Bainbridge
(Imperial College London)
27/09/2006, 16:20
Poster
The CMS micro-strip tracker data acquisition system is based on an analogue front-end ASIC, optical readout
and an off-detector VME board that performs digitization, zero-suppression and data formatting before
forwarding event fragments to the online event-building farm. Sophisticated “commissioning” procedures are
required to optimally configure, calibrate and synchronize the 10M...
Géza Székely
(Institue of Nuclear Research, ATOMKI, Debrecen, Hungary)
27/09/2006, 16:20
Poster
The CMS Barrel Muon Alignment System is composed of a series of elements - each of
large quantity - to be calibrated individually and together after assembly. This
requires an approach based on modular control and data acquisition hardware and
software including data validation features during data taking. The measured data
of all calibration steps (including full images) are stored in...
Hans Kristian Soltveit
(University Heidelberg Physikalisches institut)
27/09/2006, 16:20
Poster
The Compressed Baryonic Matter (CBM) experiment is a dedicated heavy-ion experiment
at the future accelerator Facility for Antiproton and Ion Research (FAIR), in
Darmstadt.
A Fast Transition Radiation detector will be part of this experiment. The high
reaction rates up to 10^7 event s^-1 require electronics with fast shaping time.
A preamplifier for the FAST-TRD detector has been...
Farida Fassi
(IFIC- Instituto de Fisica Corpuscular)
27/09/2006, 16:20
Poster
The ATLAS experiment currently under construction at CERN's Large Hadron Collider
presents data processing requirements of an unprecedented scale. ATLAS will accrue
tens of petabytes of data per year, distributed around the world: the collaboration
comprises more than 1800 physicists from 150 institutions in 34 countries. The
Distributed Analysis (DA) system has the goal of enabling ATLAS...
Nigel Smale
(Nuclear Physics Laboratory)
27/09/2006, 16:20
Poster
The F-CSA104 is a low noise, fully integrated, four channel preamplifier
produced in the CMOS 0.6um XFAB XC06 process, which has been developed for the
GERDA experiment. Each channel contains a charge sensitive preamplifier (CSA)
followed by a fast differential line driver for driving a 100 Ohm twisted pair
cable over 10m. It has a measuring sensitivity of 5.8 mV/fC with an expected
ENC...
Marco Boccioli
(European Organization for Nuclear Research (CERN))
27/09/2006, 16:20
Poster
The Time Projection Chamber (TPC) is the core of the ALICE experiment at CERN. The
ALICE TPC is an 88m3 cylinder filled with gas and divided in two drift regions by
the central electrode located at its axial centre.
The drift field is generated by a 100kV power supply. The TPC Very High Voltage
project covers the development of the control system for the power supply.
This paper...
Mikhail Matveev
(Rice University)
27/09/2006, 16:20
Poster
The results of data transmission tests over custom backplane, copper and optical
links at a multiples of the LHC bunch clock frequency are presented. We have
evaluated a parallel data transmission at 80MHz and 160MHz using the GTLP and
LVDS standards as well as serial copper and optical links operating at 3.2Gbps.
Jonathan Emery
(CERN)
27/09/2006, 16:20
Poster
In the frame of the design and development of the beam loss monitoring (BLM) system
for the Large Hadron Collider (LHC) a flexible tester has been developed to qualify
and verify during design and production a data acquisition card. It permits to test
completely the functionalities of the board as well as realizing analog input signal
generation to the acquisition card. The system...
Sam Silverstein
(Stockholm University)
27/09/2006, 16:20
The challenges of producing high-performance and low-latency
realtime systems for LHC have led many groups to design
systems with higher channel density and greater
interconnectivity between modules. Custom backplanes with
2mm Hard Metric connectors provide the high pin counts
necessary for these systems, but also present new problems,
including increased insertion and extraction...
Satish Dhawan
(Yale University)
27/09/2006, 16:20
Poster
We are exploring various way of employing 48 volt DC-DC converters capable of
running in high magnetic fields and /or radiation environments of the SLHC and ILC
detectors. Tradeoffs with respect to voltage conversion ratios, currents
deliverable, radiation, and magnetic field are explored.
Rafael Antunes Nobrega
(Universita di Roma I "La Sapienza")
27/09/2006, 16:20
Poster
The Muon Detector of LHCb will be equipped with about
1380 Multi-Wire Proportional
Chambers. Within the Framework of the CERN Control
System Project, using PVSS as
the main tool, we are developing an instrument to
manage such a system. Adjustment
and monitoring of High and Low Voltage power
supplies, on-line diagnostics and fine
tuning of the Front-End read-out devices, data...
Pavel Weber
(Kirchhoff-Institut fur Physik (KIP))
27/09/2006, 16:20
Poster
The Pre-Processor Multi-Chip Module (PPrMCM) is the main processing block of the
Pre-Processor System in the ATLAS Level-1 Calorimeter Trigger. The PPrMCM holds a
dedicated signal-processing ASIC and a Phos4 timing-chip together with seven
commercial dice mounted on the substrate. Those are four FADCs and three
LVDS-serialisers.
The PPrMCM holds the main functionality of the...
Diogo Nunes Caracinha
(Faculdade de Ciencias)
27/09/2006, 16:20
Poster
The interface between the ATLAS Central Trigger Processor (CTP) and the sub-
detectors read-out systems is done through the Local Trigger Processor modules.
These modules allow each sub-system to either run in global mode when it gets the
timing and trigger signals from the CTP or in local mode when it handles locally
its trigger and timing signals. During the commissioning phase of the...
Massimo Manghisoni
(Università degli Studi di Bergamo)
27/09/2006, 16:20
Poster
Deep sub-micron CMOS technologies are widely used for the implementation of front-end
electronics in various detector applications. The IC designers’ effort is presently
shifting to 130 nm CMOS technologies, or even to the next technology node, to
implement readout integrated circuits for silicon strip and pixel detectors, in view
of future HEP applications. In this work the results of...
Ulrich Trunk
(Max-Planck-Institut f. Kernfphysik)
27/09/2006, 16:20
Poster
For a new generation of 2-D neutron detectors developed in the framework of the EU
NMI3 project DETNI [8], the 128-channel frontend chip n-XYTER has been developed. To
facilitate the reconstruction of single neutron incidence points, the chip has to
provide a spatial coordinate (represented by the channel number), as well as time
stamp and amplitude information to match the data of x- and...
Magali Magne
(Laboratoire de Physique Corpusculaire de Clermont-Ferrand (LPC))
27/09/2006, 16:20
Poster
The GPL board is an optical pattern generator for the L0 Decision Unit (L0DU). Its
design is based on three FPGAs in BGA package which can send 24*16bits @ 80 MHz via
24 optical fiber link running at 1.6 Gb/s. One FPGA is used for the control of the
board, via USB or through L0DU, and two processing FPGAs are used to control the
optical channel. Each processing FPGA controls twelve...
Thijs Wijnands
(CERN)
27/09/2006, 16:20
Poster
A statistical summary on 6 years radiation testing for the
LHC machine and
experiments will be presented. The data shows that radiation
tolerance assurance to
cumulative damage effects was taken into account as an
engineering constraint in a
rather early stage in the project. The issue of Single Event
Errors was only
recognized as major issue at a much later stage in the
project...
Pietro Antonioli
(INFN - sezione di Bologna)
27/09/2006, 16:20
Poster
The read-out modules of the ALICE Time-of-flight (TOF) system
will be hosted in custom VME crates near the apparatus in a moderately
hostile environment.
Commercially available options to provide remote VME connection to the
crate have been considered to provide slow control functionalities.
The main slow control channel will be implemented through an optical
link based on the...
Ervin Denes
(KFKI Research Institute for Particle and Nuclear Physics)
27/09/2006, 16:20
Poster
The ALICE Detector Data Link (DDL) is a high-speed optical link designed to
interface the readout electronics of ALICE sub-detectors to the DAQ computers. The
Source Interface Unit (SIU) of the DDL will operate in radiation environment. Tests
showed that configuration loss of SRAM-based FPGA devices used on the prototype of
DDL SIU card was not acceptable. We developed a new version of...
Gregory Michiel Iles
(European Organization for Nuclear Research (CERN))
27/09/2006, 16:20
Poster
A revised design of Global Calorimeter Trigger (GCT) has
been implemented. The
primary function of the GCT is to process the Regional
Calorimeter Trigger (RCT)
data and transmit a summary to the Global Trigger
(GT) which computes the First
Level Trigger Accept (L1A) decision. The GCT must also
transmit a copy of the RCT
and GCT data to the CMS DAQ. This paper presents an...
Pablo Vazquez Regueiro
(Universidad de Santiago de Compostela)
27/09/2006, 16:20
Poster
The Inner Tracker of the LHCb experiment is a silicon microstrip detector consisting
of 336 detector modules with either one or two sensors. The module production is now
underway and we present here the setup employed for module testing during the
production. The setup is based in the same electronics that will e used in the final
experiment. We perform burning and ageing tests with...
Alexandra Dana Oltean Karlsson
(Polytechnic Institute of Bucharest/CERN)
27/09/2006, 16:20
Poster
LHC detectors and future experiments will produce very large amount of data that
will be transferred at multi-Gigabit speeds. At such PCB data rates, signal-
integrity effects become important and traditional rules of thumb are no longer
enough for the design and layout of the traces.
Simulations for signal-integrity effects at board level provide a way to study and
validate several...
Jose Torres Pais
(Dept. Ingenieria Electronica-Universidad de Valencia)
27/09/2006, 16:20
Poster
The Optical Multiplexer Board is a card included in the TileCal Data Acquisition
System; it is designed to receive two optical fibers with same data from front-end
boards and decided which has correct data.
Inside this card we have different transmission lines that need to be studied;
signal integrity problems such as signal delay, reflection, distortion and coupling
should be...
Jim Brooke
(H.H. Wills Physics Laboratory)
27/09/2006, 16:20
Poster
The CMS Global Calorimeter Trigger (GCT) control and
test software is described. An
object-oriented model of the GCT hardware, based on
the CMS Hardware Access Library
(HAL), was written in C++. The SWIG software interface
generator was then used to
produce a python interface to the model. This allows
the hardware to be controlled
from a python script or shell, providing a flexible...
Ankush Mitra
(Institute of Physics, Academia Sinica, Taipei, Taiwan)
27/09/2006, 16:20
Poster
The CDF Run II Silicon detector is one of the largest operating Silicon detectors in
high energy physics. It has 6m2 of Silicon sensors with 722,432 channels read out by
5456 chips. The Silicon detector allows precision tracking, vertexing and is used in
the hardware displaced vertex trigger.
The CDF silicon detector had a very challenging commissioning period of 18 months.
However...
Lax Ignazio
(INFN Bologna-LHCb)
27/09/2006, 16:20
Poster
This report presents the boards developed for the optical data transmission of the
calorimeter system of the LHCb experiment and test results. We developed two types
of transmission boards: the single-channel and the multi-channel ones. Multi-
channel boards can be equipped with a variable number of transmitters, depending on
the need, with a maximum allowed of 12 channels. Each optical...
Claudio Arnaboldi
(Sezione di Milano dell'INFN and Dipartimento di Fisica dell'Università di Milano-Bicocca, P.za della Scienza 3, Milano I-20126, Italy)
27/09/2006, 16:20
Poster
We present the High Voltage, HV, distribution system for the Hybrid Photon
Detectors (HPDs) of RICH1 and RICH2, at LHCb (484 HPDs in total). The HVs ( -20 kV,
-19.7 kV and -16.4 kV) are supplied by printed circuit boards specially developed
to prevent electrostatic discharges and/or corona effects using the limited
available volume of the HPD arrays. The circuits that will be presented...
Anton Taurok
(Institut fuer Hochenergiephysik (HEPHY)),
Manfred Jeitler
(Institut fuer Hochenergiephysik (HEPHY))
27/09/2006, 16:20
Poster
The trigger of the CMS experiment consists of two
stages: the first stage,
or Level-1 Trigger is implemented in hardware
processors while the second
stage, or High-level Trigger is implemented in software
running on a
computer farm. The Level-1 Trigger has to deliver a
trigger decision for
each LHC bunch crossing, i.e. at a rate of 40 MHz. The
Level-1 Global
Trigger uses objects...
Christos Zamantzas
(CERN)
27/09/2006, 16:20
Poster
The strategy for machine protection and quench prevention of the Large Hadron
Collider (LHC) at the European Organisation for Nuclear Research (CERN) is presently
based on the Beam Loss Monitoring (BLM) system. At each turn, there will be several
thousands of data to record and process in order to decide if the beams should be
permitted to continue circulating or their safe extraction is...
Markus Friedl
(HEPHY Vienna)
27/09/2006, 16:20
Poster
The APV25 front-end chip for the CMS Silicon Tracker has a peaking
time of 50ns, but confines the signal to a single clock period
(=bunch crossing) with its internal deconvolution filter.
This method requires a beam-synchronous clock and thus cannot be
applied to a (quasi-) continuous beam. Nevertheless, using the
multi-peak mode of the APV25, where 3 (or 6,9,12,...) consecutive
shaper...
Ping Gui
(Southern Methodist University)
27/09/2006, 16:20
Poster
Silicon-On-Sapphire (SOS) CMOS technology has been attractive to radiation tolerant
applications. The Sapphire substrate eliminates single-event latch-up (SEL) and
reduces the possibility of single event upset (SEE), but the back-channel leakage
current could cause problems to circuitry made in this technology. To better
understand the radiation effects in this technology and evaluate its...
Manfred Muecke
(CERN)
27/09/2006, 16:20
Poster
We show an alternative design approach for signal processing algorithms implemented
on FPGAs. Instead of writing VHDL code for implementation, and maintaining a C-model
for algorithm evaluation, we derive both models from one common source allowing
generation of synthesizeable VHDL and cycle- and bit-accurate C-Code.
We have tested our approach on the LHCb VELO pre-processing...
Jan Knopf
(Ruprecht-Karls-Universitat Heidelberg)
27/09/2006, 16:20
Poster
The OTIS-TDC is a 32 channel time to digital converter chip developed in Heidelberg
for the LHCb Outer Tracker experiment.
Designed in a 0,25 $\mu m$ CMOS process, it can measure times with a resolution
better than 1\,ns.
As the chip is directly mounted to its board, the test have to be performed on the
wafer itself.
As the testing period for 7\,000 chips was only three weeks, many test...