17–24 Jul 2024
Prague
Europe/Prague timezone

Design, fabrication and characterization of a bias supply circuit for SiPMs

18 Jul 2024, 19:00
2h
Foyer Floor 2

Foyer Floor 2

Poster 13. Detectors for Future Facilities, R&D, Novel Techniques Poster Session 1

Speaker

Prajjalak Chattopadhyay (Tata Institute of Fundamental Research, Mumbai)

Description

To study the feasibility of a shallow-depth neutrino detector, a Cosmic Muon Veto Detector (CMVD) is being built around the mini-ICAL detector at the IICHEP in Madurai, India. CMVD will use extruded plastic scintillators for muon detection and wavelength-shifting fibres coupled with silicon photomultipliers (SiPMs) for signal readout. A power supply source is needed for biasing the SIPMs, where the source's accuracy, precision, and stability are crucial in order to ensure consistent gain characteristics. We developed a biasing power supply circuit capable of sourcing 50-58V in 50 mV steps and up to 1mA of current. It features digital voltage adjustment and stabilization as well as current monitoring capabilities using an external controller such as microcontrollers or FPGAs. Besides providing better flexibility, the controller enables possibilities like temperature compensation. Designed to power multiple SiPMs, this circuit can be easily integrated with front-end electronics of SiPMs.

I read the instructions above Yes

Primary authors

Gobinda Majumder (Tata Inst. of Fundamental Research (IN)) Mandar Saraf (Tata Institute of Fundamental Research) Prajjalak Chattopadhyay (Tata Institute of Fundamental Research, Mumbai) Mr Ravindra Raghunath Shinde (TATA INSTITUTE OF FUNDAMENTAL RESEARCH, MUMBAI) Satyanarayana Bheesette

Presentation materials