Speaker
Description
We will report on our study focusing on developing a logical circuit for the Leven-0 (L0) Endcap Muon Trigger in the HL-LHC ATLAS experiment. We aim to achieve systematic and efficient firmware validation through a comprehensive study across hardware, software, and databases. Specific approaches include conducting systematic tests using benchmarking artificial track data, high-statistics full-simulation data, and further actual collision data. Our design of the validation system enables systematic tests, coherently injecting identical data in the software simulation environment and actual hardware testbench. Along with the system's design, we have developed a relational database to centrally manage the information of cablings and data format and a bit-wise simulator of the trigger logic circuit. This presentation will discuss the concepts of the validation system design, specific implementation methods, and experiences gained from test results.
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