ACES 2020 - Seventh Common ATLAS CMS Electronics Workshop for LHC Upgrades

26 May 2020, 07:30 → 28 May 2020, 19:50 Europe/Zurich

ZOOM

Hucheng Chen (BNL), Magnus Hansen (CERN)

Main sessions: https://cern.zoom.us/s/91875852716
Discussion session on Vidyo

Hostel_Booking form_ACES2020.docx

Tuesday, 26 May

Welcome

Conveners: Hucheng Chen (BNL), Magnus Hansen (CERN)

ACES2020_Introduction.pdf

Upgrade Overview

Convener: Hucheng Chen (BNL)

ACES2020_session1.mp4

1 Machine plans through HL-LHC

Speaker: Oliver Bruning (CERN)

ACES202-V3.pdf

ACES202-V3.pptx

2 ATLAS upgrade overview

Speaker: Didier Ferrere (Universite de Geneve (CH))

ACES2020_Upgrade_Didier.pdf

ACES2020_Upgrade_Didier.pptx

3 CMS upgrade overview

Speaker: Frank Hartmann (KIT - Karlsruhe Institute of Technology (DE))

ACES2020_CMS_Upgrade.f.pdf

4 ALICE electronics upgrade

Speaker: Alex Kluge (CERN)

20200526ACES.pdf

20200526ACES.pptx

5 LHCb electronics upgrade

Speaker: Ken Wyllie (CERN)

ACES_2020_LHCb_wyllie.pdf

ACES_2020_LHCb_wyllie.pptx

12:00 Lunch break

IC Technologies

Convener: Francois Vasey (CERN)

ACES2020_session2.mp4

6 28nm rad results

Speaker: Giulio Borghello (CERN)

ACES_2020.pdf

ACES_2020.pptx

7 Chips project

Speaker: Xavi Llopart Cudie (CERN)

CHIPS_ACES_26May2020.pdf

CHIPS_ACES_26May2020.pptx

8 65nm TID+SEU experience

Speaker: Mohsine Menouni (Centre National de la Recherche Scientifique (FR))

ACES2020_Menouni_20200526.pdf

ACES2020_Menouni_20200526.pptx

9 130nm TSMC / GF TID+SEU experience

Speaker: Pieter Everaerts (Imperial College (GB))

ACES_talk_new.pdf

10 SiGe BiCMOS electronics for ultrafast particle detection

Speaker: Lorenzo Paolozzi (Universite de Geneve (CH))

2020_05_26_ACES_Paolozzi_share.pdf

14:30 Coffee break & discussion

Common Projects

Convener: Jeroen Hegeman (CERN)

ACES2020_session_3.mp4

11 FEAST and BPOL status and plans

Speaker: Giacomo Ripamonti (CERN)

DCDC_ACES_2020.pdf

12 lpGBT status and plans

Speaker: Paulo Rodrigues Simoes Moreira (CERN)

lpGBTstatusAndPlansACES20200526.pdf

13 VL+ status and plans

Speaker: Francois Vasey (CERN)

VLplus_ACES_Vasey_26May2020.pdf

14 lpGBT and VL+ from a user perspective

Speaker: Peter Goettlicher (Deutsches Elektronen-Synchrotron (DE))

ACES_lpGBT_user.pdf

ACES_lpGBT_user.pptx

16:15 Coffee break & discussion

Timing Distribution

Convener: Francesco Lanni (Brookhaven National Laboratory (US))

ACES2020_session_4.mp4

15 High Precision Timing Distribution

Speaker: Sophie Baron (CERN)

HPTD_Updates_ACES 2020_SB.pdf

16 PON (ALICE)

Speaker: Marian Krivda (University of Birmingham (GB))

Alice_TTCPON_for_ACES_2020.pdf

17 Introduction to White rabbit

Speaker: Grzegorz Daniluk (CERN)

wr_intro_aces2020.pdf

18 The Evolution of the CMS Timing Distribution System

Speaker: Jeroen Hegeman (CERN)

aces2020_ttc_tcds_evolution.pdf

Wednesday, 27 May

Tracker Upgrade

Convener: Frank Hartmann (KIT - Karlsruhe Institute of Technology (DE))

ACES2020_session_5.mp4

19 ATLAS OT

Speaker: Peter Phillips (Science and Technology Facilities Council STFC (GB))

ACES2020_ITkStrips_final.pdf

20 CMS OT

Speaker: Katja Klein (Rheinisch Westfaelische Tech. Hoch. (DE))

ACES2020_KatjaKlein.pdf

ACES2020_KatjaKlein.pptx

21 ATLAS IT

Speaker: Fabian Huegging (University of Bonn (DE))

ATLAS-ITk-Pixel_Phase2-ACES-2020_FH.pdf

22 CMS IT

Speaker: Stella Orfanelli (CERN)

IT_ACES2020.pdf

12:00 Lunch break

Calorimeter Upgrade

Convener: Paul Aspell (CERN)

ACES2020_session_6.mp4

23 ATLAS Calo readout and TPG

Speaker: Franck Salomon (Centre National de la Recherche Scientifique (FR))

ACES_2020_TileCal_AtlasCalo_presentation.pdf

24 CMS Calo readout and TPG

Speaker: Stephen Goadhouse (University of Virginia (US))

CMS_Calo_readout_and_TPG_sdg_aces2020.pdf

25 HGcal Architecture and TPG

Speaker: Artur Lobanov (LLR – Ecole Polytechnique (FR))

ALobanov_HGCAL_ACES_2020.pdf

14:15 Coffee break

Muon Upgrade

Convener: Sandro Ventura (Universita e INFN, Padova (IT))

ACES2020_session_7.mp4

26 ATLAS muon upgrade overview and muon L1

Speaker: Davide Cieri (Max-Planck-Institut fur Physik (DE))

200527_ACES2020_dcieri (5).pdf

27 CMS muon upgrade overview and muon L1

Speaker: Isabelle De Bruyn (University of Wisconsin Madison (US))

CMS_muon_electronics_upgrade_IDB.pdf

28 GEMs

Speaker: Gilles De Lentdecker (Universite Libre de Bruxelles (BE))

CMS-GEM-ACES2020-v4.0.pdf

29 NSWs

Speaker: Panagiotis Gkountoumis (National Technical Univ. of Athens (GR))

ACES2020_NSW_20200527.pdf

16:20 Coffee break

Timing Detector & Luminosity Monitoring

Convener: Alex Grillo (University of California,Santa Cruz (US))

ACES2020_session_8.mp4

30 ATLAS and CMS precision Timing strategy

Speaker: Juanan Garcia (Chinese Academy of Sciences (CN))

ATLAS_CMS_Timing_ACES2020.pdf

31 ATLAS Timing detector electronics

Speaker: Nathalie Seguin-Moreau (OMEGA - Ecole Polytechnique - CNRS/IN2P3)

HGTD_Electronics_ACES2020_nsm.pdf

32 CMS Timing detector electronics

Speaker: Tiehui Ted Liu (Fermi National Accelerator Lab. (US))

CMS-timing-detector-electronics-final.pdf

33 Luminosity monitoring ATLAS and CMS combined

Speaker: Georg Auzinger (CERN)

Lumi_ACES.pdf

Thursday, 28 May

POSTER: SESSION 1

34 CMS Muon Drift Tubes HL-LHC Slice Test

The first prototypes of the HL-LHC electronics for the CMS On detector Board for the Drift Tube chambers (OBDT) have been installed attached to the DT chambers of the CMS detector and integrated in the central data acquisition and trigger system. They have operated together with the first backend prototypes for trigger generation and slow control. Months long data taking campaign of cosmic rays have taken place to validate the performance of these prototypes. The full chain has been operated very satisfactorily, showing the optimal efficiency and resolution of the designed Phase 2 electronics.

Speaker: Muhammad Bilal Kiani (Universita e INFN Torino (IT))

ACES2020.pdf

35 Commissioning of L1Calo phase I upgrade at ATLAS: development and testing of eFEX and FTM modules

The ATLAS level-1 calorimeter trigger (L1Calo) is a hardware system that identifies events containing calorimeter-based physics objects. In preparation for Run 3 with increased pileup (mu~65), L1Calo is currently implementing a significant programme of planned upgrades. The existing hardware will be replaced by a new system of feature extractor (FEX) modules with improved input granularity and algorithms. Here we focus on the current ongoing testing and commissioning of the electron feature extractor (eFEX) and the FEX Testing Module (FTM) at the recent slice tests at CERN. The online software developments required to do this are also discussed.

Speaker: Gareth Bird (RAL/University of Birmingham (GB))

poster.pdf

36 Experience of DAQDB as a distributed key-value store for the ATLAS data acquisition system

The Phase-II upgrade of the ATLAS experiment requires a redesign of the DAQ system, which will need to sustain 5.2 TB/s of input data for a rate of 1 MHz and provide access to 3 TB/s of these data to an event filtering farm. A possible implementation of the storage system consists of having a large storage buffer capable of decoupling the data readout from the data selection subsystem. DAQDB is an open-source implementation of a distributed key-value store for high-bandwidth, generic data storage in event-driven systems. We present the experience with integrating the system in the ATLAS DAQ framework.

Speaker: Adam Abed Abud (University of Liverpool (GB) & CERN)

ATL-COM-DAQ-2020-037.pdf

37 Front-end electronics based on a CT ∑∆ ADC for energy measurements using diamond detectors

We present the development of a simulation tool for the synthesis and simulation of Continuous-Time (CT) Delta Sigma (∑∆) ADC. For this, we decided to use a Model-based design approach which it is adopted to design such complex system. Our goal is the design of a 10 bit ENOB ADC for energy measurement systems used in particle identification through a new generation of detectors based on CVD diamond. Results of the synthesis of a proposed CT ∑∆ modulator for 10 bit ENOB ADC and simulations of the dispersion of its components using the proposed tool are demonstrated and discussed.

Speaker: Mr Abderrahmane GHIMOUZ (Abderrahmane)

poster_ACES_2020.pdf

38 GBTX and VersatileLink based readout in the CBM experiment

The CBM heavy ion experiment at the GSI/FAIR facility will employ GBTX and VersatileLink devices in five subdetectors in a free streaming readout system at interaction rates up to 10^7/s starting from 2025.

Currently prototype and medium scale preseries readout systems are used for precursor experiments in the FAIR-Phase-0 program both at GSI (mCBM) and at BNL (eTOF@STAR).

We present the existing readout boards featuring both single and multi-GBTX architectures, together with the underlying concepts for clocking, frontend control and readout, as well as experiences from operation and further developments towards the full CBM DAQ system.

Speaker: Dr Joerg Lehnert (GSI Helmholtzzentrum für Schwerionenforschung GmbH)

CBM_GBT_Readout_Poster_ACES2020_200528_JL_JF.pdf

39 OpenIPMC: a free and open source Intelligent Platform Management Controller

We present a free and open source firmware designed to operate as an Intelligent Platform Management Controller (IPMC). OpenIPMC is based on the FreeRTOS real-time operating system and is designed to be architecture-independent, allowing it to be run on a variety of different architectures. It has been tested successfully on Zynq Ultrascale+ (ARMv7-R) and ESP32 (Tensilica Xtensa LX6) devices. Having a fully free and open source code is an innovative aspect for this kind of firmware, allowing full customization by the user. This work aims to describe its development, features and usage.

Speaker: Luigi Calligaris (UNESP - Universidade Estadual Paulista (BR))

POSTER__OpenIPMC_an_Open_Source_Intelligent_Platform_Management_Controller.pdf

40 The Irradiation Facility at the Bern Cyclotron

The Bern cyclotron is an 18 MeV proton accelerator that is used to irradiate samples with a total ionising dose-rate ranging from 10 to 20^3 rad/s (10^8 to 10^11 1MeV n_{eq}/(cm^2 s)). Using a setup including beam monitoring, current measurements and a flexible infrastructure to mount samples, the setup allows testing for radiation hardness of samples (electronics, silicon sensors, cables) employed in the high-radiation environments such as the HL-LHC. In this poster, I present the setup and demonstrate its flexibility with examples of how the Bern cyclotron can be used for irradiation studies.

Speaker: Lea Halser (Universitaet Bern (CH))

ACES_Poster_LHalser_2020.pdf

41 Upgrade of the ATLAS TileCal low voltage power supply (LVPS) for the HL-LHC

The upgrade of the ATLAS TileCal LVPS falls under the HL-LHC upgrade. This upgrade is composed of multiple projects that when combined will form the latest iteration of the LVPS. One such project is focused on an LVPS component known as a brick. These bricks function to step-down bulk 200V DC current to the 10V DC current required by the front-end electronics of a TileCal module and are exposed to high levels of radiation as well as a strong magnetic field due to the operating environment within the ATLAS detector. This resulted in bricks being of highly refined custom design.

Speaker: Ryan Peter Mckenzie (University of the Witwatersrand (ZA))

ACES_2020_poster_LVPS_brick_Mckenzie_draft_3.pdf

42 ALDOv2, a multi-purpose linear regulator for the CMS Barrel Timing Layer detector

The ALDOv2 ASIC is a multi-purpose adjustable low dropout linear regulator designed in I3T80 $\mathrm{0.35\ \mu m}$ HV CMOS technology. It is specifically designed for the CMS Barrel Timing Layer (BTL) detector and its purpose is twofold: to provide the final voltage regulation for the BTL front-end chip (TOFHIR) and slow control chip (GBT-SCA), cascaded to a DCDC converter; to provide the high-side regulation for the bias voltage of SiPM photodetectors allowing also to measure of their dark current and to shutdown bias supply in case of failures. Design strategies, results from testbench and radiation hardness studies will be presented.

Speaker: Paolo Carniti (Universita & INFN, Milano-Bicocca (IT))

ALDO2_ACES_v1.pdf

43 Developments on the Tile Computer on Module (TileCoM) mezzanine board for the ATLAS Tile Calorimeter off-detector electronics

The TileCoM mezzanine board is one of the auxiliary boards of the TilePreProcessor (TilePPr) for Phase-2 Upgrade of the readout electronics of ATLAS TileCal. The TileCoM si responsible for remotely configuring the on-detector electronics and TilePPr-FPGAs and to interface ATLAS DCS-data to TilePPr. The TilePPr is composed of several FPGA-based boards to operate and read-out the on-detector electronics. The deployment of an embedded Linux for the ZYNQ System-on-Chip targeting an Avnet Ultra96-V2 Zynq UltraScale+MPSoC evaluation board is presented. This test-bench will serve as a basis for main functionalities development of the TileCoM mezzanine board and remote programming of TileCal FPGA-devices.

Speaker: Mpho Gift Doctor Gololo (University of the Witwatersrand (ZA))

ATL-COM-TILECAL-2020-022.pdf

44 KARATE - A Setup for High Rate Tests of the CMS Outer Tracker 2S Module Readout Chain

KARATE (KArlsruher high RAte TEst) is a new test system to stress the readout chain of 2S modules for the future CMS Outer Tracker. Standard test systems such as test beams or radioactive source measurements do not reach the occupancy and trigger rates expected on 2S modules. KARATE uses a combination of LEDs and photodiodes to inject variable hit patterns into the front-end of a CMS Binary Chip at 40 MHz. This gives the opportunity to compare injection patterns with readout patterns. The poster introduces the test system and summarizes high rate measurements of a CMS Binary Chip.

Speaker: Stefan Maier (KIT - Karlsruhe Institute of Technology (DE))

200528 ACES Poster - Karate.pdf

45 Opto-system prototypes and preliminary tests

The all-silicon inner tracker (ITk) envisioned for ATLAS HL-LHC upgrade features a high-speed, radiation-hard data transmission system for the Pixel Detector, of which a key stage is the electrical-to-optical conversion, which combines multiple electrical signals into an optical signal. This includes dedicated application specific integrated circuits to restore attenuated signals from the electrical data transmission, multiplex and de-multiplex the outgoing and incoming signal and a dedicated module, designed for all the LHC experiments, to provide the electrical-to-optical conversion. The integration of these components into a single board, tests of first prototypes and overall data transmission are shown.

Speaker: Meghranjana Chatterjee (Universitaet Bern (CH))

ACES20200528_Poster_MC_v1.pdf

46 Quality control of HCAL FEE (Font End Electronic Boards)

The endcap region of HCAL detector (HE) and Barrel HCAL Detector (HB) is now readout by Silicon Photomultiplier (SiPM) which are immune to the magnetic field.The SiPM Control Board, which is installed in the SiPM Readout Module (RM), provides the SiPMs with programmable individual bias voltage,measures SiPM Bias Voltage currents,drives Peltier element for SiPM cooling,measures the temperature and humidity in the SiPM envelope and also does miscellaneous housekeeping things. The quality control of about 400 such SiPM control boards were done here with a PyQT application and the method and details of these tests will be presented in the poster

Speaker: Mrs Mandakini Patil (Mandakini)

47 Reliability testing of a Low Voltage Power Supply(LVPS) and test station design for the Front-End Electronics of the ATLAS Tile Calorimeter

We present two test-station designs for testing the latest version of a switch-mode power supply for the front-end electronics of the ATLAS TileCal. The new test-station significantly improves fault detection and reliability. We further discuss the steps taken to test the new Tile-LVPS, using a custom-based software to perform tests and graphically display and record all performance metrics. The test-station verifies performance specifications laid out by TileCal and ensures protection against over-temperature, over-voltage and over-current. These test-stations will build upon the previous generation of testing-stations used in initial production of TileCal system and power next generation of upgraded LVPS hardware.

Speaker: Edward Khomotso Nkadimeng (University of the Witwatersrand (ZA))

Poster_pesentation ACES .pdf

48 SoC Based DAQ for Pixel RD53a/b Tests

The RCE (Reconfigurable Cluster Element) platform is a general-purpose system-on-chip design data acquisition system, deployed by many experiments like ATLAS, LCLS, LSST, HPS, and ProtoDUNE. We present a new generation bench-top RCE system, including a Xilinx UltraScale+ MPSoC board and a custom FMC adaptor card, which is a prototype pixel readout chips for the Phase II upgrade of ATLAS and CMS. According to measurement, the ARM NEON SIMD can increase the software speed for raw data decoding by 100%-200%. An ATCA blade to support a large number of Rd53a is also presented.

Speaker: Zijun Xu (SLAC National Accelerator Laboratory (US))

ACES2020_RCE_SoC_Readout_May28_2020.pdf

49 The Embedded Local Monitor Board 2 project status

The Embedded Local Monitor Board version 2 (ELMB2) is a fully backward compatible upgraded version of the ELMB, widely used in LHC systems and experiments for slow-control and monitoring purposes. The substitution of the most vulnerable components led to an improved performance and a higher radiation tolerance compared to its predecessor. The SEE rates, TID and NIEL effects were evaluated at 3 different irradiation facilities. The ELMB2 system description and the obtained test results are presented.
In addition, a novel DCS front-end proposal based on radiation hard components developed at CERN, the Embedded Monitoring and Control Interface (EMCI), is presented.

Speaker: Daniel Blasco Serrano (CERN)

ACES_DBlasco_A052.pdf

50 Upgrades Ventilation Crates for LHC Racks

The poster shows the work done in the last years to improve the maintainability of the turbine crates for LHC racks. With this new design, the motor-ventilator units can be extracted and exchanged inside the crate without having to remove it from the rack. This is of particular importance for those units located close to detector magnets (heavily shielded).

Speaker: Andrea Gaddi (CERN)

ACES_2020_slides.pdf

ACES_2020_slides.pptx

Track Trigger & Global Trigger

Convener: Benedetto Gorini (CERN)

ACES2020_session_9.mp4

51 ATLAS Track Trigger

Speaker: Alessandra Camplani (University of Copenhagen (DK))

Camplani_ACES.pdf

52 CMS Track Trigger

Speaker: Mark Pesaresi (Imperial College (GB))

ACES 2020_TT_v3.pdf

53 Global trigger talk combined

Speaker: David Sankey (Rutherford Appleton Laboratory (GB))

Sankey_Combined_Global_Trigger_May_20.pdf

12:00 Lunch break

ATCA Infrastructure, Power & Grounding

Convener: Arno Straessner (Technische Universitaet Dresden (DE))

ACES2020_session_10.mp4

54 ATCA chassis Market Survey for phase II, Power Supply proto procurement requests

Speaker: Vincent Bobillier (CERN)

ATCA_PS_Procurement_ACES_2020.pdf

ATCA_PS_Procurement_ACES_2020.pptx

55 Thermal management in large FPGAs in modules with a lot of optical components

Speaker: Giacomo Fedi (Imperial College (GB))

ACES2020_compressed (3).pdf

56 Rack cooling of ATCA crates

Speaker: Claudio Bortolin (CERN)

ACES 2020.pdf

ACES 2020.pptx

57 Serial power system implementation and test results

Speaker: Matthias Hamer (University of Bonn (DE))

28052020_ACESSerialPowering_mhamer.pdf

58 Power and Grounding system implementations of ATLAS ITk

Speaker: Jose Bernabeu Verdu (IFIC (ES))

GroundingATLASITk-Bernabeu.pdf

14:30 Coffee break

DAQ & DCS

Convener: Magnus Hansen (CERN)

ACES2020_session_11a.mp4

59 DAQ in ATLAS

Speaker: Fabrice Le Goff (CERN)

aces_daq_in_atlas.pdf

60 DAQ in CMS

Speaker: Christoph Schwick (CERN)

DAQ_in_PhaseII_final.pdf

61 DAQ without HW L1 in LHCb

Speaker: Niko Neufeld (CERN)

LHCb_Online_ACES_2020.pdf

62 Common Tools for Electronics Integration in Detector Controls

Speaker: Stefan Schlenker (CERN)

CentralDCS_ACES2020.pdf

16:25 Coffee break

Outlook & Closeout

Convener: Magnus Hansen (CERN)

ACES2020_session_11b.mp4

63 SoC at CERN, overview and outlook

Speaker: Ralf Spiwoks (CERN)

Spiwoks_ACES_20200528.pdf

64 CERN EP R&D for future experiments

Speaker: Christian Joram (CERN)

EP R&D ACES 2020.pdf

EP R&D ACES 2020.pptx

65 Closeout

Speakers: Hucheng Chen (BNL), Magnus Hansen (CERN)

ACES2020_Closeout.pdf

ACES2020_Closeout.pptx