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CERN openlab Technical Workshop
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Europe/Zurich
503/1-001 - Council Chamber (CERN)
Maria Girone
(CERN)
Description
During this event — which will take place over two days — we will review the CERN openlab projects carried out in the first year of our sixth three-year phase, with technical discussion of recent progress made.
Talks will be organised into sessions focused on the four R&D topics set out in CERN openlab's recent white paper: (1) data centre technologies and infrastructures, (2) computing performance and software, (3) machine learning and data analytics, (4) applications in disciplines beyond high-energy physics. There will be an additional fifth session of talks at the workshop, centred on the topic of quantum computing.
The latest technical posters from the CERN openlab projects will also be presented at the event.
Contact
Participants
140
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09:30
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09:45
Speaker: Maria Girone (CERN)
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09:45
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10:45
Computing architectures for machine learning, data acquisition and processing part 1¶ 503/1-001 - Council Chamber
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09:45
Speaker: Vaggelis Motesnitsalis (CERN)
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10:05
Speaker: Manuel Martin Marquez (CERN)
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10:25
Speaker: Filippo Maria Tilaro (CERN)
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09:45
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10:45
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11:15
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11:15
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12:15
Computing architectures for machine learning, data acquisition and processing part 1¶ 503/1-001 - Council Chamber
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11:15
Artificial intelligence, with all its different facets, makes a considerable contribution, especially in industry, toward reducing the usual expense of programming and engineering, making the control logic more agile and flexible with regard to changes in the ambient conditions and structuring production processes with greater flexibility and precision. With Future of Automation, Siemens is offering far-reaching insights into the future of automation and the role of artificial intelligence within the portfolio of Totally Integrated Automation. This means scalable solutions from the field level to the controller and edge level and all the way to the Cloud. This means that an AI solution can be scaled in terms of the environment and the target application: At the machine on the field level where fast, deterministic decisions are required, or across all machines or plants with a significantly higher quantity of data to be processed and a corresponding demand for computing power. To enable AI at the lowest level Siemens introduced a Technology module, the S7-1500 TM NPU (neural processing unit), which enables the efficient processing of neural networks. This allows to use machine-learning algorithms, for example, visual quality checks in production plants or image-guided robot system. This allows a considerably more efficient and more "human-like" behaviour possible.
Speakers: Ingo Thon (Siemens), Jose Soler Garrido (Siemens) -
11:35
Speaker: Federico Carminati (CERN)
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11:55
Speakers: Ahmad Siar Hesam (Technische Universiteit Delft (NL)), Daniel Hugo Campora Perez (Universidad de Sevilla (ES))
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11:15
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12:15
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13:30
Lunch and poster session 1h 15m 503/1-001 - Council Chamber
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13:30
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15:10
Computing architectures for machine learning, data acquisition and processing part 2¶ 503/1-001 - Council Chamber
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13:30
Speakers: Emilio Meschi (CERN), Maurizio Pierini (CERN)
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13:50
Micron introduces machine learning products designed to accelerate deep learning algorithm in hardware.
Coupled with FWDNXT Inference Engine, the programmable logic products from Micron offer the ability to execute complex neural networks in hardware.
We present expertise in neural network design, compiler and hardware acceleration. We present FWDNXT SDK software as an alternative to graphic processors for deep learning acceleration.Speaker: Mark Hur (Micron) -
14:10
Speaker: Felice Pantaleo (CERN)
- 14:30
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14:50
Speaker: Jennifer Ngadiuba (CERN)
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13:30
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15:10
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15:50
Coffee 40m Pas Perdus
Pas Perdus
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15:50
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17:35
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15:50
Speaker: Alberto Pace (CERN)
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16:10
Speaker: Luca Mascetti (CERN)
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16:30
Speaker: Aimilios Tsouvelekakis (Ministere des affaires etrangeres et europeennes (FR))
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16:50
Speaker: Antonio Nappi (CERN)
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17:10
Oracle partner talk: Making databases smarter and faster: innovations enabled by engineering software and hardware together¶ 20m
We present examples that illustrate how jointly designing a database and its underlying hardware enables innovations that overcome substantial technological challenges. Some are fundamental advances in the state of the art, and all yield reliability and performance improvements that discrete component (“converged”) computer systems can rarely attain. For example, tailoring internal network protocols enables analytics queries to run without delaying OLTP commits; pushing computing into storage scales up throughput over limited bandwidth.
This talk is for anyone interested in infrastructure-grade computer systems — not just databases — and aims to reveal the thinking of the technical staff at a large-scale development organization with a reputation for building and delivering systems that are critical for IT infrastructure across all sectors of the global economy.
Speaker: Cris Pedregal (Oracle)
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15:50
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17:35
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19:35
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17:35
Speakers: Matteo Migliorini (Universita e INFN, Padova (IT)), Viktor Khristenko (CERN)
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17:45
Speaker: Danilo Cicalese (CERN)
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17:55
Successful operations require constant awareness about the system state. Time to time, different obstacles show up, which have to be resolved as fast as possible, because user satisfaction highly depends on time. The prompt problem resolution depends on two steps: localization of the malfunctioning component and the recovery action. Monitoring aims to strike down the exploration time and provide a detailed information about the case. This poster provides an overview of Java applications monitoring used by the CERN IT-DB group.
Speaker: Viktor Kozlovszky (CERN) -
18:05
Speaker: Vaggelis Motesnitsalis (CERN)
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18:15
Speakers: Luca Canali (CERN), Riccardo Castellotti (CERN)
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17:35
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09:30
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09:45
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09:00
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10:40
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09:00
Speakers: Andrea Luiselli (Intel), Francisco Perez (Intel)
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09:20
Speaker: Danilo Cicalese (CERN)
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09:40
Speaker: Stefan Nicolae Stancu (CERN)
- 10:00
- 10:20
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09:00
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10:40
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11:10
Coffee 30m Pas Perdus
Pas Perdus
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11:10
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12:40
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11:10
Speaker: Alberto Di Meglio (CERN)
- 11:25
- 11:40
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11:55
Speaker: Alberto Di Meglio (CERN)
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12:10
Speaker: Taghi Aliyev (Universiteit Maastricht (NL))
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12:25
Speaker: Taghi Aliyev (Universiteit Maastricht (NL))
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11:10
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12:40
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14:00
Lunch and poster session 1h 20m 503/1-001 - Council Chamber
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14:00
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15:00
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14:00
Speaker: Federico Carminati (CERN)
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14:20
Speaker: Dr Sofia Vallecorsa (Gangneung-Wonju National University (KR))
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14:40
Speaker: Wen Guan (University of Wisconsin (US))
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14:00
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15:00
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15:20
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09:00
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10:40
