The context:
The Electrical Power Converters group (SY-EPC) is currently in the process of developing the latest iteration of its power converter controller, known as FGC4. It is an embedded device, based on the DI/OT hardware platform, used to control, monitor, and diagnose power converters. The primary control algorithm runs on the system board featuring Xilinx’s Zynq UltraScale+ SoC. The algorithm demands a hard real-time environment with absolute predictability in execution time to ensure stable and accurate feedback control. To meet the bandwidth requirements of upcoming power converter designs, it needs to be run on the more powerful, Cortex-A53 cores of the SoC, rather than the real-time-optimized R5 core, as the latter is simply not fast enough.
We have determined that the Linux operating system, despite extensive effort to tune it, fails to satisfy these specific constraints of determinism. However, we are aware that the remaining software components (such as the communication stack, configuration, reprogramming, etc.), can be much more effectively implemented within a standard Linux environment.
The talk:
To address this challenge, we have decided to adopt an asymmetric multiprocessing (AMP) solution. Under this approach, we allocate two out of the four A53 CPU cores to run a regular Linux kernel, while the remaining two cores are dedicated to executing bare-metal software without relying on any operating system. During our presentation we will share the research and benchmarking that lead us to selecting this particular approach. Moreover, we will delve into technical details of implementation, including: compilation of bare-metal code with Xilinx BSP, cache, MMU, and IRQ configuration, loading of the bare-metal binary, communication with the Linux application, and monitoring, reloading and protecting the system using a universal, project-independent bare-metal bootloader written specifically to implement the aforementioned features.